BT848 ETC, BT848 Datasheet - Page 85

• Manufacturer Part Number: BT848
• Description: Single-Chip Video Capture for PCI
• Manufacturer: ETC

Bt848/848A/849A
Single-Chip Video Capture for PCI
Brooktree
®
I
The Inter-Integrated Circuit (I
and data lines, SCL and SDA, are used to transfer data between the bus master and
the slave device.
ter devices, but many slaves may be in the system. The timing for the bus will be
derived from the PCI clock which may be 33 MHz or slower. Bt848’s fixed divide
by 16 divider provides a timing resolution of 0.48 S. A programmable register de-
termines the additional divide ratio to divide the clock down to 100 KHz or slower
rates. The formula for the I
where:
states.
stop condition on the bus. To initiate a transfer on the I
transmit a start pulse to the slave device. This is accomplished by taking the SDA
line low while the SCL line is held high. The master should only generate a start
pulse at the beginning of the cycle, or after the transfer of a data byte to or from the
slave. To terminate a transfer, the master must take the SDA line high while the
SCL line is held high. The master may issue a stop pulse at any time during an I
cycle. Since the I
high phase of the SCL line as a start or stop pulse, care must be taken to ensure that
data is stable during the high phase of the clock. This is illustrated in Figure 35.
Figure 35. The Relationship between SCL and SDA
2
C Interface
The Bt848 implements a single master I
An I
The relationship between SCL and SDA is decoded to provide both a start and
2
C slave may slow down the data transfer rate even further by inserting wait
SDA
SCL
I2CDIV
L848A_A
2
C bus will interpret any transition on the SDA line during the
= Register bits in the I
Bit Rate
S
TART
2
C bit rate is as follows:
2
C) bus is a two-wire serial interface. Serial clock
=
------------------------------------------------------ -
4
PCI Clock Rate
16 I2CDIV
2
C system, allowing no other I
2
C Data/Control Register
+
S
TOP
4
2
C bus, the master must
E
LECTRICAL
I
I
2
NTERFACES
C Interface
2
C mas-
75
2
C