ADE7566ASTZF8-RL2 AD [Analog Devices], ADE7566ASTZF8-RL2 Datasheet - Page 9

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ADE7566ASTZF8-RL2

Manufacturer Part Number
ADE7566ASTZF8-RL2
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
TIMING SPECIFICATIONS
AC inputs during testing are driven at V
and 0.45 V for Logic 0. Timing measurements are made at V
minimum for Logic 1 and V
Figure 2.
For timing purposes, a port pin is no longer floating when a
100 mV change from load voltage occurs. A port pin begins to
Table 2. Clock Input (External Clock Driven XTAL1) Parameter
Parameter
t
t
t
t
t
1/t
1
CK
CKL
CKH
CKR
CKF
The ADE7566/ADE7569 internal PLL locks onto a multiple (512 times) of the 32.768 kHz external crystal frequency to provide a stable 4.096 MHz internal clock for the
system. The core can operate at this frequency or at a binary submultiple defined by the CD[2:0] bits, selected via the POWCON SFR.
CORE
DV
DD
– 0.5V
0.45V
Description
XTAL1 period
XTAL1 width low
XTAL1 width high
XTAL1 rise time
XTAL1 fall time
Core clock frequency
IL
maximum for Logic 0 as shown in
0.2DV
0.2DV
SWOUT
TEST POINTS
DD
DD
− 0.5 V for Logic 1
– 0.1V
+ 0.9V
1
Figure 2. Timing Waveform Characteristics
Rev. PrA | Page 9 of 136
IH
V
LOAD
Min
0.032768
V
V
LOAD
LOAD
float when a 100 mV change from the loaded V
occurs as shown in Figure 2.
C
V
otherwise noted.
– 0.1V
+ 0.1V
LOAD
DD
= 2.7 V to 3.6 V; all specifications T
for all outputs = 80 pF, unless otherwise noted.
32.768 kHz External Crystal
Typ
30.52
6.26
6.26
9
9
1.024
REFERENCE
POINTS
TIMING
V
V
LOAD
LOAD
Max
4.096
ADE7566/ADE7569
– 0.1V
– 0.1V
V
MIN
LOAD
to T
OH
MAX
/V
, unless
OL
Unit
μs
μs
μs
ns
ns
MHz
level

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