ADE7566ASTZF8-RL2 AD [Analog Devices], ADE7566ASTZF8-RL2 Datasheet - Page 103

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ADE7566ASTZF8-RL2

Manufacturer Part Number
ADE7566ASTZF8-RL2
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
Mode 2 (8-Bit Timer/Counter with Autoreload)
Mode 2 configures the timer register as an 8-bit counter (TL0)
with automatic reload as shown in Figure 84. Overflow from TL0
not only sets TF0, but also reloads TL0 with the contents of TH0,
which is preset by software. The reload leaves TH0 unchanged.
Mode 3 (Two 8-Bit Timer/Counters)
Mode 3 has different effects on Timer 0 and Timer 1. Timer 1 in
Mode 3 simply holds its count. The effect is the same as setting
TR1 = 0. Timer 0 in Mode 3 establishes TL0 and TH0 as two
separate counters. This configuration is shown in Figure 85.
TL0 uses the Timer 0 control bits, C/ T , Gate0 (see Table 99),
TR0, TF0 (see Table 100), and INT0 . TH0 is locked into a timer
function (counting machine cycles) and takes over the use of
TR1 and TF1 from Timer 1. Therefore, TH0 controls the Timer 1
interrupt. Mode 3 is provided for applications requiring an
extra 8-bit timer or counter.
When Timer 0 is in Mode 3, Timer 1 can be turned on and off
by switching it out of and into its own Mode 3, or it can be used
by the serial interface as a baud rate generator. In fact, Timer1
can be used in any application not requiring an interrupt from
Timer 1 itself.
f
CORE
P0.6/T0
f
P0.6/T0
f
CORE
GATE
CORE
GATE
INT
INT
TR1
/12
0
0
TR0
TR0
Figure 84. Timer/Counter 0, Mode 2
Figure 85. Timer/Counter 0, Mode 3
C/T = 0
C/T = 1
C/T = 0
C/T = 1
CORE
CLK/12
CONTROL
CONTROL
(8 BITS)
(8 BITS)
TH0
TL0
RELOAD
(8 BITS)
(8 BITS)
TL0
TH0
TF1
TF0
TF0
INTERRUPT
INTERRUPT
INTERRUPT
Rev. PrA | Page 103 of 136
TIMER 2
Timer/Counter 2 Data Registers
Timer/Counter 2 also has two pairs of 8-bit data registers
associated with it: Timer 2 High Byte SFR (TH2, 0xCD), Timer
2 Low Byte SFR (TL2, 0xCC), Timer 2 Reload/Capture High
Byte SFR (RACP2H, 0xCB), and Timer 2 Reload/Capture Low
Byte SFR (RACP2L, 0xCA). These are used as both timer data
registers and as timer capture/reload registers (see Table 106 to
Table 109).
Timer/Counter 2 Operating Modes
The following sections describe the operating modes for
Timer/Counter 2. The operating modes are selected by bits in
the Timer/Counter 2 Control SFR (T2CON, 0xC8), as shown in
Table 101 and Table 110.
Table 110. T2CON Operating Modes
RCLK (or) TCLK
0
0
1
X
16-Bit Autoreload Mode
Autoreload mode has two options that are selected by Bit EXEN2
in Timer/Counter 2 Control SFR (T2CON, 0xC8). If EXEN2 = 0
when Timer 2 rolls over, it not only sets TF2 but also causes the
Timer 2 registers to be reloaded with the 16-bit value in registers
Timer 2 Reload/Capture High Byte SFR (RACP2H, 0xCB) and
Timer 2 Reload/Capture Low Byte SFR (RACP2L, 0xCA),
which are preset by software. If EXEN2 = 1, Timer 2 performs
the same events as when EXEN2 = 0, but adds a 1-to-0 transition
at external input T2EX, which triggers the 16-bit reload and sets
EXF2. Autoreload mode is shown in Figure 86.
16-Bit Capture Mode
Capture mode has two options that are selected by Bit EXEN2
in Timer/Counter 2 Control SFR (T2CON, 0xC8). If EXEN2 = 0,
Timer 2 is a 16-bit timer or counter that, upon overflowing, sets
Bit TF2, the Timer 2 overflow bit, which can be used to generate
an interrupt. If EXEN2 = 1, Timer 2 performs the same events
as when EXEN2 = 0, but adds a l-to-0 transition on external
input T2E, which causes the current value in the Timer 2 registers,
TL2 and TH2, to be captured into the RCAP2L and RCAP2H
registers, respectively. In addition, the transition at T2EX causes
Bit EXF2 in T2CON to be set, and EXF2, like TF2, can generate
an interrupt. Capture mode is shown in Figure 87. The baud
rate generator mode is selected by RCLK = 1 and/or TCLK = 1.
In either case, if Timer 2 is used to generate the baud rate, the TF2
interrupt flag does not occur. Therefore, Timer 2 interrupts do
not occur and do not have to be disabled. In this mode, the EXF2
flag can, however, still cause interrupts that can be used as a third
external interrupt. Baud rate generation is described as part of
the UART serial port operation in UART Serial Interface section.
CAP2
0
1
X
X
TR2
1
1
1
0
ADE7566/ADE7569
Mode
16-Bit Autoreload
16-Bit Capture
Baud Rate
Off

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