FL103 FAIRCHILD [Fairchild Semiconductor], FL103 Datasheet - Page 12

• Manufacturer Part Number: FL103
• Description: Primary-Side-Regulation PWM Controller for LED Illumination
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

© 2012 Fairchild Semiconductor Corporation
FL103 • Rev. 1.0.1
Pulse-by-Pulse Current Limit
When the current sensing voltage (V
current-sense
exceeds the internal threshold of 0.8V, the MOSFET
(Q1) is turned off for the remainder of switching cycle. In
normal operation, the pulse-by-pulse current limit is not
triggered because the peak current is limited by the
control loop.
Leading-Edge Blanking (LEB)
Each time the power MOSFET (Q1) switches on, a turn-
on spike occurs at the sense resistor (R
premature termination of the switching pulse, a leading-
edge blanking time is built in. Conventional RC filtering
can be omitted. During this blanking period, the current-
limit comparator is disabled and cannot switch off the
gate driver.
Gate Output
The FL103 output stage is a fast totem-pole gate driver.
Cross conduction has been avoided to minimize heat
dissipation, increase efficiency, and enhance reliability.
The output driver is clamped by an internal 15V Zener
diode to protect power MOSFET transistors against
undesired over-voltage gate signals.
Built-in Slope Compensation
The sensed voltage across the current-sense resistor is
used for Current Mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillations due to
peak-current
synchronized, positive-slope ramp built-in at each
switching cycle.
mode
resistor
control.
(R
Sense
)
The
of
FL103
MOSFET
CS
Sense
) across the
). To avoid
has
(Q1)
a
12
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulse-width jitter, particularly in
Continuous-Conduction
compensation helps alleviate these problems, further
precautions should still be taken. Good placement and
layout practices should be followed. Avoiding long PCB
traces and component leads, locating compensation
and filter components near the FL103, and increasing
the power MOSFET gate resistance are advised.
Operation Area
Figure 24 shows operation area. FL103 has two
switching frequency (f
is 50kHz. In this case, FL103 can be operated with best
condition for LED illumination. The output voltage range
is between normal output voltage (V
normal output voltage (V
the output voltage is dropped, by increased load and
decreasing the number of LEDs, the output voltage (V
drops under 50% of normal voltage (V
V
protection. To avoid 33kHz, V
with enough margin.
DD
drops to near UVLO protection and triggers
Figure 24.
S
) in Constant Current Mode. One
O
N
Operation Area
). The other is 33kHz. When
Mode.
O
N
should be designed
O
O
While
N
N
) and 50% of
). At that time,
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slope
O
)