AM41DL6408H8H70IS AMD [Advanced Micro Devices], AM41DL6408H8H70IS Datasheet - Page 51
AM41DL6408H8H70IS
Manufacturer Part Number
AM41DL6408H8H70IS
Description
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM41DL6408H8H70IS.pdf
(66 pages)
- Current page: 51 of 66
- Download datasheet (2Mb)
AC CHARACTERISTICS
Note: VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read
cycle, and array data read cycle.
November 24, 2003
Note: DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#f to
toggle DQ2 and DQ6.
Addresses
DQ6/DQ2
WE#
DQ6
DQ2
RY/BY#
CE#f
WE#
OE#
Embedded
Erasing
Enter
Valid Data
t
DH
t
OEH
Erase
Figure 24. Toggle Bit Timings (During Embedded Algorithms)
Suspend
Erase
A D V A N C E
Erase Suspend
(first read)
Status
Valid
Read
t
OEPH
Figure 25. DQ2 vs. DQ6
Suspend Program
Enter Erase
Am41DL6408H
t
AHT
t
OE
I N F O R M A T I O N
(second read)
t
ASO
Status
Valid
Suspend
Program
Erase
t
CEPH
t
t
AHT
AS
Erase Suspend
Read
(stops toggling)
Resume
Erase
Status
Valid
Erase
Valid Data
Complete
Erase
49
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