9DB1933AKLF IDT [Integrated Device Technology], 9DB1933AKLF Datasheet - Page 8

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9DB1933AKLF

Manufacturer Part Number
9DB1933AKLF
Description
Nineteen Output Differential Buffer for PCIe Gen3
Manufacturer
IDT [Integrated Device Technology]
Datasheet
IDT
TA = T
1
2
3
4
Electrical Characteristics - PCIe Phase Jitter Parameters
Applies to all outputs.
See http://www.pcisig.com for complete specs
Sample size of at least 100K cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12.
Subject to final radification by PCI SIG.
9DB1933
Nineteen Output Differential Buffer for PCIe Gen3
Phase Jitter, PLL Mode
®
Additive Phase Jitter,
Nineteen Output Differential Buffer for PCIe Gen3
COM;
PARAMETER
Bypass Mode
Supply Voltage VDD = 3.3 V +/-5%
SYMBOL
t
t
t
t
t
t
jphPCIeG1
jphPCIeG2
jphPCIeG3
jphPCIeG1
jphPCIeG2
jphPCIeG3
(PLL BW of 2-4MHz, CDR = 10MHz)
(PLL BW of 2-4MHz, CDR = 10MHz)
1.5MHz < f < Nyquist (50MHz)
1.5MHz < f < Nyquist (50MHz)
PCIe Gen 2 High Band
PCIe Gen 2 High Band
PCIe Gen 2 Lo Band
PCIe Gen 2 Lo Band
10kHz < f < 1.5MHz
10kHz < f < 1.5MHz
CONDITIONS
PCIe Gen 1
PCIe Gen 3
PCIe Gen 1
PCIe Gen 3
8
MIN
TYP
0.02
0.04
1.4
2.5
0.6
0.2
44
3
MAX
3.1
0.1
0.3
0.1
86
3
5
1
1676A—07/12/10
ps (p-p)
ps (p-p)
UNITS
(rms)
(rms)
(rms)
(rms)
(rms)
(rms)
ps
ps
ps
ps
ps
ps
Notes
1,2,3
1,2,4
1,2,3
1,2,4
1,2
1,2
1,2
1,2

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