AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 79
AM79C974KCW
Manufacturer Part Number
AM79C974KCW
Description
PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C974KCW.pdf
(153 pages)
- Current page: 79 of 153
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In this example, the contents of the WMAC register is
pointing to page frame address #1. When the first entry
in the MDL is read (page frame address #1), the WMAC
register is incremented to point to the next page entry
(page frame address #2).
2. Issue the Start DMA Command. The SCSI control-
3. When the WAC register (bits 11:0) reaches the
ler reads the page frame address (bits 31:12) from
first 4K byte boundary, the SCSI controller reads
the second MDL entry and combines the page
frame address (bits 31:12) from this entry of the
MDL with bits 11:00 of the WAC register. This be-
comes the physical address for page#2. Since the
WAC
WAC
SPA
31
31
31
31
31
Page Frame Address #2
Page Frame Address #1
From the MDL
From the MDL
XXXX
SMDLA
WMAC
12
12
12
Starting Offset
Starting Offset
Programmed by
the software
P R E L I M I N A R Y
0
0
0
Am79C974
0
0
0
31
the MDL entry and combines it with the first page
offset value in the Starting Physical Address (SPA)
register (bits 11:0). This 32-bit value is loaded into
the Working Address Counter (WAC) register and
becomes the physical address for page#1, as
shown below. The WMAC is then incremented to
point to the next entry in the MDL.
WAC register (bits 11:0) has rolled over to ‘00h’,
the WAC now points to the beginning of the Page
Frame Address #2 as shown below. The WMAC
is then incremented to point to the next entry in
the MDL.
Page Frame Address #1
Page Frame Address #2
Page Frame Address #3
Page Frame Address #4
Page Frame Address #n
MDL
4K Page #2
4K Page #1
Data
Data
12
Ignored
Ignored
Ignored
Ignored
Ignored
18681A/1-31
18681A/1-32
0
18681A/1-33
AMD
79
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