AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 113
![no-image](/images/no-image-200.jpg)
AM79C974KCW
Manufacturer Part Number
AM79C974KCW
Description
PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C974KCW.pdf
(153 pages)
- Current page: 113 of 153
- Download datasheet (833Kb)
Ethernet Controller
Control and Status Registers
Note: u = undefined value, R = Running register, S = Setup register, T = Test register
RAP Addr
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
Symbol
CSR0
CSR1
CSR2
CSR3
CSR4
CSR5
CSR6
CSR7
CSR8
CSR9
CSR10
CSR11
CSR12
CSR13
CSR14
CSR15
CSR16
CSR17
CSR18
CSR22
CSR20
CSR21
Default Value
see reg. desc.
uuuu 0004
uuuu uuuu
uuuu uuuu
uuuu 0000
uuuu 0115
uuuu 0000
uuuu uuuu
uuuu 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
H_RESET
After
P R E L I M I N A R Y
PCnet-SCSI Status Register
IADR[15:0]: Base Address of INIT Block Lower
IADR[31:16]: Base Address of INIT Block Upper
Interrupt Masks and Deferral Control
Test and Features Control
Reserved
RXTX: RX/TX Descriptor Table Lengths
Reserved
LADR0: Logical Address Filter — LADRF[15:0]
LADR1: Logical Address Filter — LADRF[31:16]
LADR2: Logical Address Filter — LADRF[47:32]
LADR3: Logical Address Filter — LADRF[63:48]
PADR0: Physical Address Register — PADR[15:0]
PADR1: Physical Address Register — PADR[31:16]
PADR2: Physical Address Register — PADR[47:32]
MODE: Mode Register
IADR[15:0]: Alias of CSR1
IADR[31:16]: Alias of CSR2
CRBAL: Current RCV Buffer Address Lower
CRBAU: Current RCV Buffer Address Upper
CXBAL: Current XMT Buffer Address Lower
CXBAU: Current XMT Buffer Address Upper
Am79C974
Comments
AMD
Use
R
R
S
S
S
T
T
T
T
T
T
T
T
T
T
S
T
T
T
T
T
T
113
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