AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 55
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AM79C974KCW
Manufacturer Part Number
AM79C974KCW
Description
PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C974KCW.pdf
(153 pages)
Collision Detection
A MAU detects the collision condition on the network
and generates a differential signal at the CI inputs. This
collision signal passes through an input stage which de-
tects signal levels and pulse duration. When the signal is
detected by the MENDEC it sets the internal collision
signal HIGH. The condition continues for approximately
1.5 bit times after the last LOW-to-HIGH transition on
CI .
Jitter Tolerance Definition
The MENDEC utilizes a clock capture circuit to align its
internal data strobe with an incoming bit stream. The
clock acquisition circuitry requires four valid bits with the
values 1010b. Clock is phase-locked to the negative
transition at the bit cell center of the second “0” in the
pattern.
Since data is strobed at 1/4 bit time, Manchester transi-
tions which shift from their nominal placement through
1/4 bit time will result in improperly decoded data. With
this as the criteria for an error, a definition of Jitter Han-
dling is:
Attachment Unit Interface (AUI)
The AUI is the PLS (Physical Layer Signaling) to PMA
(Physical Medium Attachment) interface which effec-
tively connects the DTE to a MAU. The differential inter-
face provided by the Am79C974 controller is fully
compliant to Section 7 of ISO 8802-3 (ANSI/IEEE
802.3).
After the Am79C974 controller initiates a transmission it
will expect to see data “looped-back” on the DI pair
(when the AUI port is selected). This will internally gen-
erate a “carrier sense”, indicating that the integrity of the
data path to and from the MAU is intact, and that the
MAU is operating correctly. This “carrier sense” signal
must be asserted at least 6 bit times before the last
transmitted bit on DO (when using the AUI port). If “car-
rier sense” does not become active in response to the
data transmission, or becomes inactive before the end
of transmission, the loss of carrier (LCAR) error bit will
be set in the Transmit Descriptor Ring (TMD2, bit 27) af-
ter the frame has been transmitted.
Twisted-Pair Transceiver (T-MAU)
The T-MAU implements the Medium Attachment Unit
(MAU) functions for the Twisted-Pair Medium, as speci-
fied by the supplement to ISO 8802-3 (IEEE/ANSI
802.3) standard (Type 10BASE-T). The T-MAU pro-
vides twisted pair driver and receiver circuits, including
on-board transmit digital predistortion and receiver
The peak deviation approaching or crossing 1/4 bit
cell position from nominal input transition, for which
the MENDEC section will properly decode data.
P R E L I M I N A R Y
Am79C974
squelch and a number of additional features including
Link Status indication, Automatic Twisted-Pair Receive
Polarity Detection/Correction and Indication, Receive
Carrier Sense, Transmit Active and Collision Present
indication.
Twisted-Pair Transmit Function
The differential driver circuitry in the TXD and TXP
pins provides the necessary electrical driving capability
and the pre-distortion control for transmitting signals
over maximum length Twisted-Pair cable, as specified
by the 10BASE-T supplement to the ISO 8802-3 (IEEE/
ANSI 802.3) Standard. The transmit function for data
output meets the propagation delays and jitter specified
by the standard.
Twisted-Pair Receive Function
The receiver complies with the receiver specifications of
the ISO 8802-3 (IEEE/ANSI 802.3) 10BASE-T Stan-
dard, including noise immunity and received signal re-
jection criteria (‘Smart Squelch’). Signals meeting these
criteria appearing at the RXD differential input pair are
routed to the MENDEC. The receiver function meets the
propagation delays and jitter requirements specified by
the standard. The receiver squelch level drops to half its
threshold value after unsquelch to allow reception of
minimum amplitude signals and to offset carrier fade in
the event of worst case signal attenuation and crosstalk
noise conditions.
Note that the 10BASE-T Standard defines the receive
input amplitude at the external Media Dependent Inter-
face (MDI). Filter and transformer loss are not specified.
The T-MAU receiver squelch levels are defined to ac-
count for a 1 dB insertion loss at 10 MHz, which is typical
for the type of receive filters/transformers employed.
Normal 10BASE-T compatible receive thresholds are
employed when the LRT bit (CSR15[9]) is LOW. When
the LRT bit is set (HIGH), the Low Receive Threshold
option is invoked, and the sensitivity of the T-MAU re-
ceiver is increased. This allows longer line lengths to be
employed, exceeding the 100 m target distance of nor-
mal 10BASE-T (assuming typical 24 AWG cable). The
increased receiver sensitivity compensates for the in-
creased signal attenuation caused by the additional
cable distance.
However, making the receiver more sensitive means
that it is also more susceptible to extraneous noise, pri-
marily caused by coupling from co-resident services
(crosstalk). For this reason, it is recommended that
when using the Low Receive Threshold option that the
service should be installed on 4-pair cable only. Multi-
pair cables within the same outer sheath have lower
crosstalk attenuation, and may allow noise emitted from
adjacent pairs to couple into the receive pair, and be of
sufficient amplitude to falsely unsquelch the T-MAU.
AMD
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