AM79C974KCW AMD [Advanced Micro Devices], AM79C974KCW Datasheet - Page 31

• Manufacturer Part Number: AM79C974KCW
• Description: PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
• Manufacturer: AMD [Advanced Micro Devices]

Bus Acquisition
The Am79C974 microcode (in the buffer management
section) will determine when a DMA transfer should be
initiated. The first step in any Am79C974 bus master
transfer is to acquire ownership of the bus. This task is
handled by synchronous logic within the BIU. Bus own-
ership is requested with the REQ signal and ownership
is granted by the arbiter through the GNT signal.
Figure 5 shows the Am79C974 controller bus acquisi-
tion. GNT is asserted at clock 3. The Am79C974 control-
ler starts driving AD[31:00] and C/BE[3:0] prior to clock
4. FRAME is asserted at clock 5 indicating a valid ad-
dress and command on AD[31:00] and C/BE[3:0].
ADSTEP (bit 7) in the PCI Command register is set to
ONE to indicated that the Am79C974 controller uses ad-
dress stepping. Address stepping is only used for the
first address phase of a bus master period.
P R E L I M I N A R Y
Am79C974
FRAME
C/BE
REQ
GNT
CLK
AD
1
Figure 5. Bus Acquisition
2
3
4
ADDR
CMD
AMD
5
18681A-9
31