ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 73

• Manufacturer Part Number: ZL50015GAC
• Description: Enhanced 1 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

External Read/Write Address: 0067
Reset Value: 000F
15 - 4
External Read/Write Address: 0068
Reset Value: 0000
15 - 4
15
3 - 1
0
Bit
Bit
3
2
1
0
15
0
0
14
0
14
0
Unused
Unused
Name
RIM
HIM
ICB3 - 1
LIM
Unused
Unused
Name
H
13
0
H
13
0
Reserved
In normal functional mode, these bits MUST be set to zero.
Lock Interrupt Mask Bit
When this bit is high, it masks the lock status change interrupt.
Reference Change Interrupt Mask Bit
When this bit is high, it masks the reference change interrupt.
Holdover Interrupt Mask Bit
When this bit is high, it masks the holdover entry/exit interrupt.
Reserved
In normal functional mode, this bit MUST be set to one.
12
0
12
0
Reserved
In normal functional mode, these bits MUST be set to zero.
Interrupt Clear Bits
Writing a “1” to any bit in this register will clear the corresponding bit in the Interrupt
Register (IR). The Interrupt Clear Register is self-clearing, i.e. once it has completed
its action, the ICR register bit returns to 0.
Reserved
In normal functional mode, this bit MUST be set to one.
H
11
Table 37 - Interrupt Mask Register (IMR) Bits
0
H
11
Table 38 - Interrupt Clear Register (ICR) Bits
0
10
0
10
0
9
0
9
Zarlink Semiconductor Inc.
0
ZL50015
8
0
8
0
73
7
0
7
0
Description
Description
6
0
6
0
5
0
5
0
4
0
4
0
LIM
3
ICB
3
3
RIM
2
ICB
2
2
HIM
1
ICB
Data Sheet
1
1
0
1
0
1