AK4647VN AKM [Asahi Kasei Microsystems], AK4647VN Datasheet - Page 18

• Manufacturer Part Number: AK4647VN
• Description: Stereo CODEC with MIC/HP-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
There are the following four clock modes to interface with external devices (see Table 1 and Table 2).
Mode
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
Don’t Care (Note 31)
Note 31. If this mode is selected, the invalid clocks are output from MCKO pin when MCKO bit is “1”.
Mode
PLL Master Mode
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
PLL Slave Mode
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK4647 is power-down mode (PDN pin = “L”) and exits reset state, the AK4647 is slave mode. After exiting reset state,
the AK4647 goes to master mode by changing M/S bit = “1”.
When the AK4647 is used by master mode, LRCK and BICK pins are a floating state until M/S bit becomes “1”. LRCK
and BICK pins of the AK4647 should be pulled-down or pulled-up by the resistor (about 100kΩ) externally to avoid the
floating state.
MS0566-E-00
System Clock
Master Mode/Slave Mode
Table 3. Select Master/Salve Mode
Table 1. Clock Mode Setting (x: Don’t care)
M/S bit
Table 2. Clock pins state in Clock Mode
0
1
OPERATION OVERVIEW
MCKO bit
PMPLL bit
0
1
0
1
0
0
1
1
1
0
0
Master Mode
Slave Mode
- 18 -
Mode
Selected by
Selected by
MCKO pin
PS1-0 bits
PS1-0 bits
“L”
“L”
“L”
“L”
M/S bit
1
0
0
0
1
Default
PLL3-0 bits
PLL3-0 bits
Selected by
Selected by
Selected by
MCKI pin
FS3-0 bits
GND
PLL3-0 bits
See Table 4
See Table 4
See Table 4
(Selected by
(Selected by
x
x
(Selectet by
BCKO bit)
BCKO bit)
BCKO bit)
BICK pin
(≥ 32fs)
Output
Input
Input
Input
Figure 13
Figure 14
Figure 15
Figure 17
LRCK pin
Figure
Output
Input
Input
Input
[AK4647]
(1fs)
(1fs)
(1fs)
(1fs)
-
2006/11