100336QI Fairchild Semiconductor, 100336QI Datasheet - Page 6

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100336QI

Manufacturer Part Number
100336QI
Description
IC COUNTER/SHIFT REGISTER 28PLCC
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 100336QI

Logic Type
Shift Register
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
4
Function
Serial to Parallel
Voltage - Supply
4.2 V ~ 5.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
100336QI
Manufacturer:
Fairchild Semiconductor
Quantity:
10 000
Part Number:
100336QIX
Manufacturer:
Fairchild Semiconductor
Quantity:
10 000
www.fairchildsemi.com
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SHIFT
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PHL
PLH
PHL
PLH
PHL
TLH
THL
S
H
PW
OSHL
OSLH
OST
PS
SOIC and PLCC AC Electrical Characteristics
V
Note 6: The propagation delay specified is for single output switching. Delays may vary up to 250 ps with multiple outputs switching.
Note 7: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t
directions both HL and LH (t
Symbol
EE
(H)
4.2V to 5.7V, V
Shift Frequency
Propagation Delay
CP to Q
Propagation Delay
CP to TC (Shift)
Propagation Delay
CP to TC (Count)
Propagation Delay
MR to Q
Propagation Delay
MR to TC (Count)
Propagation Delay
MR to TC (Shift)
Propagation Delay
D
Propagation Delay
S
Transition Time
20% to 80%, 80% to 20%
Setup Time
Hold Time
Pulse Width HIGH
CP, MR
Maximum Skew Common Edge
Output-to-Output Variation
Clock to Output Path
Maximum Skew Common Edge
Output-to-Output Variation
Clock to Output Path
Maximum Skew Opposite Edge
Output-to-Output Variation
Clock to Output Path
Maximum Skew
Pin (Signal) Transition Variation
Clock to Output Path
0
n
D
P
D
CEP
S
MR (Release Time)
D
P
D
CEP
S
/CET to TC
to TC
3
n
0
n
3
n
0
n
/CET
/CET
n
n
, Q
, Q
Parameter
n
n
OST
CC
). Parameters t
V
CCA
GND
OST
1.00
2.10
2.40
1.40
2.80
2.40
1.80
1.90
0.35
0.90
1.40
1.20
1.30
3.30
2.50
0.30
0.20
0.20
0.10
0.00
2.00
and t
Min
350
T
C
ps
guaranteed by design
0 C
Max
1.80
3.30
4.20
2.30
4.90
3.80
2.90
3.90
1.10
245
200
200
230
1.00
2.10
2.40
1.40
2.90
2.40
1.80
1.90
0.35
0.90
1.40
1.20
1.30
3.30
2.50
0.30
0.20
0.20
0.10
0.00
2.00
Min
350
T
C
6
25 C
Max
1.80
3.30
4.20
2.30
5.00
3.80
2.90
3.90
1.10
200
200
230
245
1.00
2.10
2.60
1.50
3.10
2.50
1.90
2.10
0.35
0.90
1.40
1.20
1.30
3.30
2.50
0.30
0.20
0.20
0.10
0.00
2.00
Min
350
T
C
85 C
Max
1.80
3.50
4.50
2.40
5.30
3.90
3.10
4.20
1.10
OSHL
200
200
230
245
), or LOW-to-HIGH (t
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
Figures 2, 3
Figures 1, 2
(Note 6)
Figures 1, 7, 8
(Note 6)
Figures 1, 9
(Note 6)
Figures 1, 4
(Note 6)
Figures 1, 12
(Note 6)
Figures 1, 10, 11
(Note 6)
Figures 1, 5
(Note 6)
Figures 1, 3
Figures 4, 6
Figure 6
Figures 3, 4
PLCC Only
(Note 7)
PLCC Only
(Note 7)
PLCC Only
(Note 7)
PLCC Only
(Note 7)
OSLH
Conditions
), or in opposite

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