CX28344 Conexant, CX28344 Datasheet - Page 66
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CX28344
Manufacturer Part Number
CX28344
Description
(CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
Manufacturer
Conexant
Datasheet
1.CX28344.pdf
(195 pages)
- Current page: 66 of 195
- Download datasheet (2Mb)
Functional Description
2-20
IDLE
The DS3 IDLE signal has valid framing and parity. With both X-bits set to 1, the
payload is set to a 1100... pattern—starting with 11 after each Overhead bit. The C-
bits in M-subframe 3 are set to 0, and the remaining C-bits can individually be a 1 or a
0, and can vary with time.
The transmission of idle code is enabled by setting TxAlm [1,0] bit pair to 10 for each
framer individually, and continues as long as those bits are set to 10. The start and
termination of IDLE generation are frame aligned (IDLE transmission initiates with
the beginning of the next frame after setting TxAlm [1,0] bit pair to 10 and terminates
at the beginning of the next frame after setting TxAlm [1,0] bit pair to other than 10).
In both DS3 framing modes (M13/M23 or C-bit parity), when IDLE code generation
is enabled, the framers transmitter line output is replaced with the DS3 IDLE pattern.
It is internally generated regardless of the inserted data. The C-bits are handled as
follows: the C-bits in M-subframe 3 are set to 0 and the remaining C-bits are set
according to their method of generation setting (from Internal-Auto, from Internal-
Reg, from External-data, or from External-Pin) that are set for each mode, described
in
specifications. When the transmitter starts generating the IDLE alarm, the transmitter
keeps the previous M-frame’s synchronization.
The handling of the C-bits in IDLE code generation is such to allow full use of the
remaining C-bits, e.g., to use terminal data link and transmit FEAC channel in C-bit
parity mode during transmission of IDLE code.
FEBE
The FEBE alarm in DS3 is defined for C-bit parity application only. The three C-bits
in M-subframe 4 are used as FEBE-bits.
In C-bit parity mode, when the ExtFEBE/Cj-bit in the Transmit Overhead Insertion 1
Control register is set to 0, the FEBE bits are not expected on TEXT input pin. FEBE
alarms are automatically generated in the transmitter when the receiver detects either
a frame bit error (F or M-bit error) or a path parity error in an M-frame. The 3-bit
FEBE pattern that is transmitted is contained in the FEBE Pattern Bit Field (FEBEC/
PT[1:3]) of the Feature1 Control register of each framer respectively. When no alarm
condition is present, the FEBE channel contains all-1s. To prevent disabling proper
FEBE operation during the Internal-Auto method of FEBE, the FEBE field should be
written to any combination other than 111.
NOTE:
Section 2.
Mindspeed Technologies™
The rest of the Overhead bits are generated according to IDLE code
FEBE transmission is performed at the first opportunity after framing error or CP
error detection. Automatic FEBE transmission also remains operational (if set) during
receiver OOF, LOS, AIS, or IDLE conditions. When FEBE bits are inserted from an
external pin or with data, the automatic FEBE insertion is disabled and Pattern Bit
Field settings have no meaning—FEBE bits are inserted externally.
CX28342/3/4/6/8 Data Sheet
28348-DSH-001-B
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