CX28344 Conexant, CX28344 Datasheet - Page 4
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CX28344
Manufacturer Part Number
CX28344
Description
(CX2834x) Dual / Triple / Quad / Hex / Octal - Enhanced DS3 / E3 Framer
Manufacturer
Conexant
Datasheet
1.CX28344.pdf
(195 pages)
- Current page: 4 of 195
- Download datasheet (2Mb)
iv
Contents
2.2
2.3
2.4
2.5
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4.1
2.4.2
2.4.3
2.4.4
2.5.1
Receiver Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-58
Loopbacks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-62
Joint Test Access Group (JTAG) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-65
Line-Side Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
System-Side Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-36
Clock Dejitter FIFO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-40
Overhead Bit Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-41
2.2.4.1
2.2.4.2
Performance Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-44
2.2.5.1
2.2.5.2
2.2.5.3
2.2.5.4
2.2.5.5
2.2.5.6
2.2.5.7
2.2.5.8
2.2.5.9
2.2.5.10
2.2.5.11
One-Second Counter Latching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-48
Terminal Data Link Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-49
2.2.7.1
2.2.7.2
2.2.7.3
Far-End Alarm and Control Channel Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-55
2.2.8.1
2.2.8.2
Address/Data Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-58
Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-58
Interrupt Requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-58
Hardware Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-59
Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-59
Initialization Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-60
Shallow Line Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-62
Remote Line Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-63
Payload Loopback. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-63
Source Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-64
Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-65
Processing of Overhead Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-41
Internal Processing of Overhead Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-42
Bipolar Violation (BPV), Excessive Zeros (EXZ), and Line Code Violation (LCV) . 2-45
Loss of Signal (LOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-45
Framing Bit Error (FBE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-45
Out of Frame (OOF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-46
Severely Errored Frame (SEF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-46
Alarm Indication Signal (AIS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-47
Idle Signal (IDLE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-47
Parity Error (PER) and P-Bit Disagreement (PBD) . . . . . . . . . . . . . . . . . . . . . . . 2-47
Path Parity Error (PPER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-48
Remote Alarm/Defect Indication (RAI/RDI), X-bit disagreement (XBD) . . . . . . . 2-48
Far-End Block Error/Remote Error Indication (FEBE/REI) . . . . . . . . . . . . . . . . . . 2-48
Initial Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-51
Writing Messages into the FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-52
Reading Messages from the FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-53
Writing into the FEAC Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-57
Reading from the FEAC Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-57
Mindspeed Technologies™
CX28342/3/4/6/8 Data Sheet
28348-DSH-001-B
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