COP87L84RK National Semiconductor, COP87L84RK Datasheet - Page 6
COP87L84RK
Manufacturer Part Number
COP87L84RK
Description
8-Bit CMOS OTP Microcontrollers with 8k or 32k Memory/ Comparator/ and Single-slope A/D Capability
Manufacturer
National Semiconductor
Datasheet
1.COP87L84RK.pdf
(75 pages)
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DC Electrical Characteristics COP88xEB
(Continued)
Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at V
or GND, and outputs open.
CC
Note 4: The HALT mode will stop CKI from oscillating in the Crystal configurations. Halt test conditions: All inputs tied to V
; Port C, G, E, F, L, M and N I/Os con-
CC
figured as outputs and programmed low; D outputs programmed high. Parameter refers to HALT mode entered via setting bit 7 of the Port G data register. Part will
pull up CKI during HALT in crystal clock mode. Both CAN main comparator and the CAN Wakeup comparator need to be disabled.
Note 5: HALT and IDLE current specifications assume CAN block comparators are disabled.
Note 6: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages greater than V
and the pins will have sink current
CC
to V
when biased at voltages greater than V
(the pins do not have source current when biased at a voltage below V
). The effective resistance to V
is 750
CC
CC
CC
CC
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 7: Condition and parameter valid only for part in HALT mode.
Note 8: Parameter characterized but not tested.
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