COP87L84RK National Semiconductor, COP87L84RK Datasheet - Page 17

• Manufacturer Part Number: COP87L84RK
• Description: 8-Bit CMOS OTP Microcontrollers with 8k or 32k Memory/ Comparator/ and Single-slope A/D Capability
• Manufacturer: National Semiconductor

Timers
sequently, the TxC0 control bit should be reset when enter-
ing the Input Capture mode. The timer underflow interrupt is
enabled with the TxENA control flag. When a TxA interrupt
occurs in the Input Capture mode, the user must check both
whether a TxA input capture or a timer underflow (or both)
caused the interrupt.
TIMER CONTROL FLAGS
The control bits and their functions are summarized below.
TxC3
TxC2
TxC1
TxC0
TxPNDA Timer Interrupt Pending Flag
TxENA
TxPNDB Timer Interrupt Pending Flag
TxENB
(Continued)
Timer mode control
Timer mode control
Timer mode control
Timer Start/Stop control in Modes 1 and 2 (Pro-
cessor Independent PWM and External Event
Counter), where 1 = Start, 0 = Stop
Timer Underflow Interrupt Pending Flag in
Mode 3 (Input Capture)
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
FIGURE 11. Timer in Input Capture Mode
17
Figure 11 shows a block diagram of the timer in Input Cap-
ture mode.
DS012837-12
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