ST92T163 ST Microelectronics, ST92T163 Datasheet - Page 62

• Manufacturer Part Number: ST92T163
• Description: 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS
• Manufacturer: ST Microelectronics

ST92163 - INTERRUPTS
INTERRUPT REGISTERS (Cont’d)
EXTERNAL MEMORY REGISTER 2 (EMR2)
R246 - Read/Write
Register Page: 21
Reset value: 0000 1111 (0Fh)
Bit 7, 5:0 = Reserved, keep in reset state. Refer to
the external Memory Interface Chapter.
Bit 6 = ENCSR: Enable Code Segment Register.
This bit is set and cleared by software. It affects
the ST9 CPU behaviour whenever an interrupt re-
quest is issued.
0: The CPU works in original ST9 compatibility
62/224
mode. For the duration of the interrupt service
routine, ISR is used instead of CSR, and the in-
terrupt stack frame is identical to that of the orig-
inal ST9: only the PC and Flags are pushed.
This avoids saving the CSR on the stack in the
event of an interrupt, thus ensuring a faster in-
7
0
ENCSR
0
0
1
1
1
0
1
1: ISR is only used to point to the interrupt vector
terrupt response time. The drawback is that it is
not possible for an interrupt service routine to
perform inter-segment calls or jumps: these in-
structions would update the CSR, which, in this
case, is not used (ISR is used instead). The
code segment size for all interrupt service rou-
tines is thus limited to 64K bytes.
table and to initialize the CSR at the beginning
of the interrupt service routine: the old CSR is
pushed onto the stack together with the PC and
flags, and CSR is then loaded with the contents
of ISR. In this case, iret will also restore the
CSR from the stack. This approach allows inter-
rupt service routines to access the entire 4
Mbytes of address space; the drawback is that
the interrupt response time is slightly increased,
because of the need to also save the CSR on
the stack. Full compatibility with the original ST9
is lost in this case, because the interrupt stack
frame is different; this difference, however,
should not affect the vast majority of programs.