ST92T163 ST Microelectronics, ST92T163 Datasheet - Page 150

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ST92T163

Manufacturer Part Number
ST92T163
Description
8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS
Manufacturer
ST Microelectronics
Datasheet

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ST92163 - SERIAL COMMUNICATIONS INTERFACE (SCI)
8.4 SERIAL COMMUNICATIONS INTERFACE (SCI)
8.4.1 Introduction
The Serial Communications Interface (SCI) offers
full-duplex serial data exchange with a wide range
of external equipment. The SCI offers four operat-
ing modes: Asynchronous, Asynchronous with
synchronous clock, Serial expansion and Syn-
chronous.
The SCI offers the following principal features:
Figure 71. SCI Block Diagram
150/224
Full duplex synchronous and asynchronous
operation.
Transmit, receive, line status, and device
address interrupt generation.
Integral Baud Rate Generator capable of
dividing the input clock by any value from 2 to
2
16X data sampling clock for asynchronous
operation or the 1X clock for synchronous
operation.
Fully programmable serial interface:
– 5, 6, 7, or 8 bit word length.
– Even, odd, or no parity generation and detec-
– 0, 1, 1.5, 2, 2.5, 3 stop bit generation.
– Complete status reporting capabilities.
– Line break generation and detection.
16
tion.
-1 (16 bit word) and generating the internal
SOUT
TRANSMIT
REGISTER
TRANSMIT
REGISTER
BUFFER
SHIFT
RTS
CONTROLLER
SDS
DMA
TXCLK/CLKOUT RXCLK
ST9 CORE BUS
Frame Control
ALTERNATE
COMPARE
ADDRESS
and STATUS
REGISTER
FUNCTION
GENERATOR
CLOCK and
BAUD RATE
CONTROLLER
DMA
– Local loopback for communications link fault
– Auto-echo for communications link fault isola-
– High speed communication
– Possibility of hardware synchronization (RTS/
– Programmable polarity and stand-by level for
– Programmable active edge and stand-by level
– Programmable active levels of RTS/DCD sig-
– Full Loop-Back and Auto-Echo modes for DA-
Programmable address indication bit (wake-up
bit) and user invisible compare logic to support
multiple microcomputer networking. Optional
character search function.
Internal diagnostic capabilities:
Separate interrupt/DMA channels for transmit
and receive.
In addition, a Synchronous mode supports:
DCD
RECEIVER
REGISTER
RECEIVER
REGISTER
BUFFER
isolation.
tion.
DCD signals).
data SIN/SOUT.
for clocks CLKOUT/RXCL.
nals.
TA, CLOCKs and CONTROLs.
SHIFT
SIN
VA00169A

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