ST92T163 ST Microelectronics, ST92T163 Datasheet - Page 166

• Manufacturer Part Number: ST92T163
• Description: 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS
• Manufacturer: ST Microelectronics

ST92163 - SERIAL COMMUNICATIONS INTERFACE (SCI)
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
INTERRUPT VECTOR REGISTER (S_IVR)
R244 - Read/Write
Reset value: undefined
Bit 7:3 = V[7:3]: SCI Interrupt Vector Base Ad-
dress.
User programmable interrupt vector bits for trans-
mitter and receiver.
Bit 2:1 = EV[2:1]: Encoded Interrupt Source.
Both bits EV2 and EV1 are read only and set by
hardware according to the interrupt source.
Bit 0 = D0: This bit is forced by hardware to 0.
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EV2 EV1
V7
0
0
1
1
7
0
1
0
1
V6
Receiver Error (Overrun, Framing, Parity)
Break Detect or Address Match
Received Data Pending/Receiver DMA
End of Block
Transmitter buffer or shift register empty
transmitter DMA End of Block
V5
V4
Interrupt source
V3
EV2
EV1
0
0
ADDRESS/DATA COMPARE REGISTER (ACR)
R245 - Read/Write
Reset value: undefined
Bit 7:0 = AC[7:0]: Address/Compare Character .
With either 9th bit address mode, address after
break mode, or character search, the received ad-
dress will be compared to the value stored in this
register. When a valid address matches this regis-
ter content, the Receiver Address Pending bit
(RXAP in the S_ISR register) is set. After the
RXAP bit is set in an addressed mode, all received
data words will be transferred to the Receiver Buff-
er Register.
AC7
7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
0