ATTIny2313-16MI ATMEL Corporation, ATTIny2313-16MI Datasheet - Page 62
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ATTIny2313-16MI
Manufacturer Part Number
ATTIny2313-16MI
Description
8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATTINY2313-16MI.pdf
(211 pages)
- Current page: 62 of 211
- Download datasheet (3Mb)
External Interrupt Flag
Register – EIFR
Pin Change Mask Register –
PCMSK
62
ATtiny2313/V
• Bit 7 – INTF1: External Interrupt Flag 1
When an edge or logic change on the INT1 pin triggers an interrupt request, INTF1
becomes set (one). If the I-bit in SREG and the INT1 bit in GIMSK are set (one), the
MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the inter-
rupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to
it. This flag is always cleared when INT1 is configured as a level interrupt.
• Bit 6 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0
becomes set (one). If the I-bit in SREG and the INT0 bit in GIMSK are set (one), the
MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the inter-
rupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to
it. This flag is always cleared when INT0 is configured as a level interrupt.
• Bit 5 – PCIF: Pin Change Interrupt Flag
When a logic change on any PCINT7..0 pin triggers an interrupt request, PCIF becomes
set (one). If the I-bit in SREG and the PCIE bit in GIMSK are set (one), the MCU will
jump to the corresponding Interrupt Vector. The flag is cleared when the interrupt routine
is executed. Alternatively, the flag can be cleared by writing a logical one to it.
• Bit 7..0 – PCINT7..0: Pin Change Enable Mask 15..8
Each PCINT7..0-bit selects whether pin change interrupt is enabled on the correspond-
ing I/O pin. If PCINT7..0 is set and the PCIE bit in GIMSK is set, pin change interrupt is
enabled on the corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on
the corresponding I/O pin is disabled.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PCINT7
INTF1
R/W
R/W
7
0
7
0
PCINT6
INTF0
R/W
R/W
6
0
6
0
PCINT5
PCIF
R/W
R/W
5
0
5
0
PCINT4
R/W
R
4
–
0
4
0
PCINT3
R
R/W
3
–
0
3
0
PCINT2
R
2
–
0
R/W
2
0
PCINT1
R
1
–
0
R/W
1
0
PCINT0
R
0
–
0
2543C–AVR–12/03
R/W
0
0
EIFR
PCMSK
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