ATTIny2313-16MI ATMEL Corporation, ATTIny2313-16MI Datasheet - Page 22

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ATTIny2313-16MI

Manufacturer Part Number
ATTIny2313-16MI
Description
8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
System Clock and
Clock Options
Clock Systems and their
Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
22
ATtiny2313/V
I/O
CPU
FLASH
Figure 11 presents the principal clock systems in the AVR and their distribution. All of
the clocks need not be active at a given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes, as
described in “Power Management and Sleep Modes” on page 30. The clock systems
are detailed below.
Figure 11. Clock Distribution
The CPU clock is routed to parts of the system concerned with operation of the AVR
core. Examples of such modules are the General Purpose Register File, the Status Reg-
ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the
core from performing general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, and
USART. The I/O clock is also used by the External Interrupt module, but note that some
external interrupts are detected by asynchronous logic, allowing such interrupts to be
detected even if the I/O clock is halted. Also note that start condition detection in the USI
module is carried out asynchronously when clk
detection in all sleep modes.
The Flash clock controls operation of the Flash interface. The Flash clock is usually
active simultaneously with the CPU clock.
General I/O
Modules
External Clock
clk
I/O
Control Unit
AVR Clock
Multiplexer
Clock
Source clock
Oscillator
Crystal
CPU Core
clk
clk
Reset Logic
CPU
FLASH
I/O
Watchdog clock
is halted, enabling USI start condition
Watchdog Timer
RAM
Watchdog
Oscillator
Calibrated RC
Flash and
EEPROM
Oscillator
2543C–AVR–12/03

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