DSM2150F5V STMicroelectronics, DSM2150F5V Datasheet - Page 50

• Manufacturer Part Number: DSM2150F5V
• Description: DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
• Manufacturer: STMicroelectronics

DSM2150F5V
JTAG Extensions
TSTAT and TERR are two JTAG extension signals
(must be used as a pair) enabled by a command
received over the four standard JTAG signals
(TMS, TCK, TDI, and TDO) by PSDsoft Express.
They are used to speed Program and Erase cycles
by indicating status on device pins instead of hav-
ing to scan the status out serially using the stan-
dard JTAG channel. See Application Note
AN1153.
TERR indicates if an error has occurred when
erasing a sector or programming a byte in Flash
memory. This signal goes Low (active) when an
Error condition occurs.
TSTAT behaves the same as Ready/Busy de-
scribed previously.
the device is in READ Mode (Flash memory con-
INITIAL DELIVERY STATE
When delivered from ST, the device has all bits in
the memory and PLDs erased to logic ’1.’ The
DSM Configuration Register Bits are set to ’0.’ The
code, configuration, and PLD logic are loaded us-
50/73
TSTAT
is inactive logic ’1’ when
tents can be read).
memory Program or Erase cycles are in progress.
TSTAT and TERR can be configured as open-
drain type signals with PSDsoft Express. This fa-
cilitates a wired-OR connection of TSTAT signals
from multiple DSM2150F5V devices and a wired-
OR connection of TERR signals from those same
devices. This is useful when several devices are
“chained” together in a JTAG environment. PSD-
soft Express puts TSTAT and TERR signals to
open-drain by default. Click on 'Properties' in the
JTAG-ISP window of PSDsoft Express to change
to standard CMOS push-pull. It is recommended
to use 10k
ISP signals on your circuit board.
ing the programming procedure. The four basic
JTAG ISP signals (TCK, TMS, TDI, TDO) are
ready for ISP function.
pull-up resistors to V
TSTAT
is logic ’0’ when Flash
CC
on all JTAG-