DSM2150F5V STMicroelectronics, DSM2150F5V Datasheet - Page 13

• Manufacturer Part Number: DSM2150F5V
• Description: DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
• Manufacturer: STMicroelectronics

RUNTIME CONTROL REGISTER DEFINITION
A block of 256 addresses are decoded inside the
DSM2150F5V for control and status. 50 locations
contain registers that the DSP accesses at runt-
ime. The base address of the registers is called
csiop (Chip Select I/O Port). Table
Table 4. CSIOP Registers and Their Offsets (in Hexadecimal)
Data In
Data Out
Direction
Drive Select
Input
Macrocells
Enable Out
Output
Macrocells A
Output
Macrocells B
Mask
Macrocells A
Mask
Macrocells B
Main Flash
Sector Protect
Security Bit
and
Secondary
Flash Sector
Protection
JTAG Enable
PMMR0
PMMR2
Page
Memory_ID0
Memory_ID1
Register
Name
Port
0A
0C
00
04
06
08
A
Port
0B
0D
01
05
07
09
B
Port
1A
1C
10
14
16
18
C
Port
11
15
17
19
D
4
lists the reg-
Port
30
34
36
38
E
Port
41
45
47
49
G
Other
C0
C2
C7
B0
B4
E0
20
21
22
23
F0
F1
isters and their offsets (in hexadecimal) from the
csiop base. See Appendix
Note: Do not write to unused locations, they
should remain logic zero.
Note: See
reset and at power-on.
MCUI/O Input Mode. Read to obtain current logic
level of Port pins. No WRITEs.
MCU I/O Output Mode. Write to set logic level on
Port pins. Read to check status.
MCU I/O Mode. Configures Port pin as input or
output. Write to set direction of Port pins.
Logic ’1’ = out, Logic ’0’ = in. Read to check status.
Write to configure Port pins as either standard
CMOS or Open Drain on some pins, while selecting
high slew rate on other pins. Read to check status.
Read to obtain state of IMCs. No WRITEs.
Read to obtain the status of the output enable logic
on each I/O Port driver. No WRITEs.
Read to get logic state of output of OMC bank A.
Write to load registers of OMC bank A.
Read to get logic state of output of OMC bank B.
Write to load registers of OMC bank B.
Write to set mask for loading OMCs in bank A. Logic
’1’ in a bit position will block READs/WRITEs of the
corresponding OMC. Logic ’0’ will pass OMC value.
Read to check status.
Write to set mask for loading OMCs in bank B. Logic
’1’ in a bit position will block READs/WRITEs of the
corresponding OMC. Logic ’0’ will pass OMC value.
Read to check status.
Read to determine Main Flash Sector Protection
Setting. No WRITEs.
Read to determine if DSM devices Security Bit is
active. Logic ’1’ = device secured.
Also read to determine Secondary Flash Protection
Setting status. No WRITEs.
Write to enable JTAG Pins (optional feature). Read to
check status.
Power Management Register 0. WRITE and READ.
Power Management Register 2. WRITE and READ.
Memory Page Register. WRITE and READ.
Read to get size of Main Flash memory. No WRITEs.
Read to get size of 2nd Flash memory. No WRITEs.
Table 14., page 48
Description
B
for bit definitions.
for register state at
DSM2150F5V
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