CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 71

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

DS271PP3
4.5 Initiate Transmit Registers
4.5.1 Transmit Command Request - TxCMD
(Write-only, Address: PacketPage base + 0144h)
The word written to PacketPage base + 0144h tells the CS8900A how the next packet should be transmitted. This
PacketPage location is write-only, and the written word can be read from Register 9, at PacketPage base + 0108h.
The CS8900A does not transmit a frame if TxLength (at PacketPage location base + 0146h) is less than 3. See
Section 5.7 on page 99.
001001
TxStart
Force
Onecoll
InhibitCRC
TxPadDis
Since this register is write-only, it’s initial state after reset is undefined.
4.5.2 Transmit Length
(Write-only, Address: PacketPage base + 0146h)
This register is used in conjunction with register 9, TxCMD. When a transmission is initiated via a command in Tx-
CMD, the the length of the transmitted frame is written into this register. The length of the transmitted frame may be
modified by the configuration of the TxPadDis and InhibitCRC bits in the TxCMD register. See Table 35, and
Section 5.7 on page 99. TxLength must be >3 and < 1519.
Since this register is write-only, it’s initial state after reset is undefined.
CS8900A
Crystal LAN™ ISA Ethernet Controller
F
7
Most-significant byte of Transmit Frame Length
TxStart
Command Register. When reading this register, these bits will be 001001, where the LSB cor-
responds to Bit 0.
starts the packet transmit process.
Bit 7
mit buffer are deleted. If a previous packet has started transmission, that packet is terminated
within 64 bit times with a bad CRC.
CS8900A allows up to 16 normal collisions before terminating the transmission.
is set, then the CS8900A pads to 60 bytes. If the host gives a transmit length less than 60 bytes
and InhibitCRC is clear, then the CS8900A pads to 60 bytes and appends the CRC.
When TxPadDis is set, the CS8900A allows the transmission of runt frames (a frame less than
64 bytes). If InhibitCRC is clear, the CS8900A appends the CRC. If InhibitCRC is set, the
CS8900A does not append the CRC.
These bits provide an internal address used by the CS8900A to identify this as the Transmit
This pair of bits determines how many bytes are transferred to the CS8900A before the MAC
When set in conjunction with a new transmit command, any transmit frames waiting in the trans-
When this bit is set, any transmission will be terminated after only one collision. When clear, the
When set, the CRC is not appended to the transmission.
When TxPadDis is clear, if the host gives a transmit length less than 60 bytes and InhibitCRC
E
6
0
0
1
1
Address 0147h
Bit 6
1
0
1
0
TxPadDis
Start transmission after the entire frame is in the CS8900A
D
5
Start transmission after 5 bytes are in the CS8900A
Start transmission after 381 bytes are in the CS8900A
Start transmission after 1021 bytes are in the CS8900A
CIRRUS LOGIC PRODUCT DATA SHEET
InhibitCRC
C
4
B
3
Least-significant byte of Transmit Frame Length
001001
A
2
Address 0146h
Onecoll
1
9
Force
0
8
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