CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 58
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CS8900-CQ3
Manufacturer Part Number
CS8900-CQ3
Description
Crystal LAN ISA Ethernet Controller
Manufacturer
Cirrus Logic
Datasheet
1.CS8900-CQ3.pdf
(128 pages)
- Current page: 58 of 128
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4.4.11 Register 9: Transmit Command Status
(TxCMD, Read-only, Address: PacketPage base + 0108h)
This register contains the latest transmit command which tells the CS8900A how the next packet should be sent.
The command must be written to PacketPage base + 0144h in order to initiate a transmission. The host can read
the command from register 9 (PacketPage base + 0108h). See Section 5.7 on page 99.
001001
TxStart
Force
Onecoll
InhibitCRC
TxPadDis
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM
is found, then the register’s initial value may be set by the EEPROM. See Section 3.3 on page 19.
Regster value is: 0000 0000 0000 1001
Notes: The CS8900A does not transmit a frame if TxLength < 3
58
7
F
TxStart
Command Register. When reading this register, these bits will be 001001, where the LSB cor-
responds to Bit 0.
starts the packet transmit process.
mit buffer are deleted. If a previous packet has started transmission, that packet is terminated
within 64 bit times with a bad CRC.
CS8900A allows up to 16 normal collisions before terminating the transmission.
is set, then the CS8900A pads to 60 bytes. If the host gives a transmit length less than 60 bytes
and InhibitCRC is clear, then the CS8900A pads to 60 bytes and appends the CRC.
When TxPadDis is set, the CS8900A allows the transmission of runt frames (a frame less than
64 bytes). If InhibitCRC is clear, the CS8900A appends the CRC. If InhibitCRC is set, the
CS8900A does not append the CRC
These bits provide an internal address used by the CS8900A to identify this as the Transmit
This pair of bits determines how many bytes are transferred to the CS8900A before the MAC
Bit 7 Bit 6
When set in conjunction with a new transmit command, any transmit frames waiting in the trans-
When this bit is set, any transmission will be terminated after only one collision. When clear, the
When set, the CRC is not appended to the transmission.
When TxPadDis is clear, if the host gives a transmit length less than 60 bytes and InhibitCRC
6
E
0
0
1
1
1
0
1
0
TxPadDis
Start transmission after the entire frame is in the CS8900A
Start transmission after 5 bytes are in the CS8900A
Start transmission after 381 bytes are in the CS8900A
Start transmission after 1021 bytes are in the CS8900A
D
5
CIRRUS LOGIC PRODUCT DATA SHEET
InhibitCRC
C
4
B
3
Crystal LAN™ ISA Ethernet Controller
001001
A
2
Onecoll
1
9
CS8900A
DS271PP3
Force
0
8
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