CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 43

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

DS271PP3
4.3.3 Interrupt Number
(Read/Write, Address: PacketPage base + 0022h)
The Interrupt Number Register defines the interrupt pin selected by the CS8900A. In a typical application the follow-
ing bus signals are tied to the following pins:
See Section 3.2 on page 18.
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state, which corre-
sponds to placing all the INTRQ pins in a high-impedance state. If an EEPROM is found, then the register’s initial
value may be set by the EEPROM. See Section 3.3 on page 19.
Reset value is: XXXX XXXX XXXX X100
4.3.4 DMA Channel Number
(Read/Write, Address: PacketPage base + 0024h)
The DMA Channel register defines the DMA pins selected by the CS8900A. In the typical application, the following
bus signals are tied to the following pins:
See Section 3.2 on page 18 and Section 5.4 on page 90.
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state which corre-
sponds to setting all DMRQ pins to high-impedance. If a EEPROM is found, then the register’s initial value may be
set by the EEPROM. See Section 3.3 on page 19.
Reset value is: XXXX XXXX XXXX XX11
CS8900A
Crystal LAN™ ISA Ethernet Controller
Bus signal
Bus signal
DACK5
DACK6
DACK7
IRQ10
IRQ12
IRQ11
DRQ5
DRQ6
DRQ7
IRQ5
Address 0023h
Address 0025h
00h
00h
Typical pin connection
Typical pin connection
CIRRUS LOGIC PRODUCT DATA SHEET
DMACK0
DMACK1
DMACK2
INTRQ3
INTRQ0
INTRQ1
INTRQ2
DMRQ0
DMRQ1
DMRQ2
0000 01XXb= All INTRQ pins high-impedence
0000 0011b= All DMRQ pins high-impedence
0000 0000b= pin DMRQ0 and DMACK0
0000 0001b= pin DMRQ1 and DMACK1
0000 0010b= pin DMRQ2 and DMACK2
Interrupt number assignment:
DMA channel assignment:
0000 0000b= pin INTRQ0
0000 0001b= pin INTRQ1
0000 0010b= pin INTRQ2
0000 0011b= pin INTRQ3
Address 0022h
Address 0024h
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