WM8580AGEFTRV WOLFSON [Wolfson Microelectronics plc], WM8580AGEFTRV Datasheet - Page 31

• Manufacturer Part Number: WM8580AGEFTRV
• Description: Multichannel CODEC with S/PDIF Transceiver
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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DAC OUTPUT CONTROL
The DAC output control word determines how the left and right inputs to the audio interface are
applied to the left and right DACs:
Table 19 DAC Attenuation Register (PL)
ZERO FLAG OUTPUT
Each DAC channel has a “zero detect circuit” which detects when 1024 consecutive zero samples
have been input. Should both channels of a DAC indicate a zero-detect (or if either DACPD or
DMUTE is set for that DAC), then the Zero Flag for that DAC is asserted. The DZFM register bits
determine which Zero Flag is visible on the MUTE and GPO pins.
Table 20 DZFM Register
REGISTER ADDRESS
REGISTER ADDRESS
DAC Control 2
DAC Control 2
R16
R16
10h
10h
BIT
BIT
6:4
3:0
LABEL
DZFM[2:0]
PL[3:0]
LABEL
DEFAULT
1001
DEFAULT
000
PL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Selects the source for ZFLAG
000 - All DACs Zero Flag
001 - DAC1 Zero Flag
010 - DAC2 Zero Flag
011 - DAC3 Zero Flag
100 - ZFLAG = 0
101 - ZFLAG = 0
110 - ZFLAG = 0
111 - ZFLAG = 0
DESCRIPTION
DESCRIPTION
Left O/P
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
PD Rev 4.3 August 2007
Right
Right
Right
Right
Mute
Mute
Mute
Mute
Left
Left
Left
Left
WM8580
Right O/P
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
Right
Right
Right
Right
Mute
Mute
Mute
Mute
Left
Left
Left
Left
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