71M6534 MAXIM [Maxim Integrated Products], 71M6534 Datasheet - Page 31

• Manufacturer Part Number: 71M6534
• Description: Exceeds IEC 62053/ANSI C12.20 Standards
• Manufacturer: MAXIM [Maxim Integrated Products]

is terminated by a return from instruction, RETI. When an RETI is performed, the processor will return to
the instruction that would have been next when the interrupt occurred.
When the interrupt condition occurs, the processor will also indicate this by setting a flag bit. This bit is
set regardless of whether the interrupt is enabled or disabled. Each interrupt flag is sampled once per
machine cycle, then samples are polled by the hardware. If the sample indicates a pending interrupt
when the interrupt is enabled, then the interrupt request flag is set. On the next instruction cycle, the interrupt
will be acknowledged by hardware forcing an LCALL to the appropriate vector address, if the following
conditions are met:
•
•
•
Special Function Registers for Interrupts
The following SFR registers control the interrupt functions:
•
•
•
•
Rev 2
No interrupt of equal or higher priority is already in progress.
An instruction is currently being executed and is not completed.
The instruction in progress is not RETI or any write access to the registers IEN0, IEN1, IEN2, IP0 or IP1.
The interrupt enable registers: IEN0, IEN1 and IEN2 (see
The Timer/Counter control registers, TCON and T2CON (see
The interrupt request register, IRCON (see
The interrupt priority registers: IP0 and IP1 (see
IEN0[7]
IEN0[6]
IEN0[5]
IEN0[4]
IEN0[3]
IEN0[2]
IEN0[1]
IEN0[0]
IEN1[7]
IEN1[6]
IEN1[5]
IEN1[4]
IEN1[3]
IEN1[2]
IEN1[1]
IEN1[0]
IEN2[0]
Bit
Bit
Bit
Symbol Function
Symbol Function
Symbol Function
WDT
EAL
EX1
EX0
EX6
EX5
EX4
EX3
EX2
ES0
ET1
ET0
ES1
–
–
–
–
EAL = 0 disables all interrupts.
Not used for interrupt control.
Not Used.
ES0 = 0 disables serial channel 0 interrupt.
ET1 = 0 disables timer 1 overflow interrupt.
EX1 = 0 disables external interrupt 1.
ET0 = 0 disables timer 0 overflow interrupt.
EX0 = 0 disables external interrupt 0.
Not used.
Not used.
EX6 = 0 disables external interrupt 6: XFER_BUSY, RTC_1SEC, WD_NROVF
EX5 = 0 disables external interrupt 5: EEPROM_BUSY
EX4 = 0 disables external interrupt 4: PLL_OK (rise), PLL_OK (fall)
EX3 = 0 disables external interrupt 3: CE_BUSY
EX2 = 0 disables external interrupt 2: FWCOL0, FWCOL1, SPI
Not Used.
ES1 = 0 disables the serial channel 1 interrupt.
Table 24: The IEN0 Bit Functions (SFR 0xA8)
Table 26: The IEN2 Bit Functions (SFR 0x9A)
Table 25: The IEN1 Bit Functions (SFR 0xB8)
Table
Table
29).
34).
Table
Table 27
24,
Table 25
and
Table
and
28).
Table
26).
31