MC9S12A128 MOTOROLA [Motorola, Inc], MC9S12A128 Datasheet - Page 77

no-image

MC9S12A128

Manufacturer Part Number
MC9S12A128
Description
Microcontroller unit (MCU)
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12A128BCFU
Manufacturer:
SIEMENS
Quantity:
3 274
Part Number:
MC9S12A128BCFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12A128BCFU
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC9S12A128BCFUE
Manufacturer:
EEMB
Quantity:
100
Part Number:
MC9S12A128BCPV
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12A128CFUE
Manufacturer:
FREESCALE
Quantity:
3 200
Part Number:
MC9S12A128CFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12A128CFUE
Manufacturer:
FREESCALE
Quantity:
3 200
Part Number:
MC9S12A128CFUE
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC9S12A128CPV
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC9S12A128CPVE
Manufacturer:
FREESCALE
Quantity:
2 390
Part Number:
MC9S12A128CPVE
Manufacturer:
FREESCALE
Quantity:
20 000
The loop bandwidth f
typical values are 50. = 0.9 ensures a good transient response.
And finally the frequency relationship is defined as
With the above inputs the resistance can be calculated as:
The capacitance C
The capacitance C
The stabilization delays shown in
component selection (e.g. crystal, XFC filter).
A.5.3.2 Jitter Information
The basic functionality of the PLL is shown in
deviation from the reference clock f
accordingly.The adjustment is done continuously with no abrupt changes in the clock output frequency.
Noise, voltage, temperature and other factors cause slight variations in the control loop resulting in a clock
jitter. This jitter affects the real minimum and maximum clock periods as illustrated in
s
p
can now be calculated as:
should be chosen in the range of:
C
should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10,
f
C
<
------------------------------------------ -
Table A-16
C
ref
2
s
+
n
is measured and input voltage to the VCO is adjusted
=
=
C
1
f
----------------------
ref
s
f
-------------- -
+
2
VCO
R
f
ref
f
C
20
2
=
Figure
are dependant on PLL operational settings and external
2
2
-----------------------------
R
=
----- -
50
C
1
p
2
K
0.516
-------------- -
f
C
n f
A-2. With each transition of the clock f
C
f
synr
C
R
s
C
;
<
10
------------- -
4 50
+
f
=
ref
1
0.9
;
MC9S12A128 Device Guide — V01.01
=
0.9
Figure
cmp
A-3.
, the
77

Related parts for MC9S12A128