LPC1113 NXP [NXP Semiconductors], LPC1113 Datasheet - Page 60

• Manufacturer Part Number: LPC1113
• Description: 32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash and 8 kB SRAM
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
15. Revision history
Table 22.
LPC1111_12_13_14
Product data sheet
Document ID
LPC1111_12_13_14 v.5
Modifications:
LPC1111_12_13_14 v.4
Modifications:
LPC1111_12_13_14 v.3
Modifications:
LPC1111_12_13_14 v.2
Modifications:
LPC1111_12_13_14 v.1
Revision history
Release date
20110622
20110210
20101110
20100818
20100416
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ADC sampling frequency corrected in
Pull-up level specified in
Parameter T
WWDT for parts LPC111x/102/202/302 added in
Programmable open-drain mode for parts LPC111x/102/202/302 added in
and
Condition for parameter T
Table note 4
Section 13
Removed PLCC44 package information.
Power consumption graphs added for parts LPC111x/102/202/302 (Figure 13 to
Figure 17).
Parameter V
Typical value for parameter N
I
(minimum) for 2.0 V  V
Section 11.6 “ElectroMagnetic Compatibility (EMC)” added.
Power-up characterization added (Section 10.1 “Power-up ramp conditions”).
Parts LPC111x/102/202/302 added (LPC1100L series).
Power consumption data for parts LPC111x/102/202/302 added in Table 7.
PLL output frequency limited to 100 MHz in Section 7.15.2.
Description of RESET and WAKEUP functions updated in Section 6.
WDT description updated in Section 7.14. The WDT is a 24-bit timer.
Power profiles added to Section 2 and Section 7 for parts LPC111x/102/202/302.
V
t
Deep-sleep mode functionality changed to allow BOD and watchdog oscillator as the
only analog blocks allowed to remain running in Deep-sleep mode (Section 7.15.5.3).
V
Reset state of pins and start logic functionality added in Table 3 to Table 5.
Section 7.16.1 added.
Section “Memory mapping control” removed.
V
Section 9.4 added.
2
DS
ESD
DD
OH
C-bus pins configured as standard mode pins, parameter I
updated for SPI in master mode (Table 17).
Section
range changed to 3.0 V  V
and I
All information provided in this document is subject to legal disclaimers.
limit changed to 6500 V (min) /+6500 V (max) in Table 6.
OH
added.
cy(clk)
7.12.
hys
of
specifications updated for high-drive pins in Table 7.
Rev. 5 — 22 June 2011
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Table 5
for I
corrected on
2
C bus pins: typical value corrected V
updated.
DD
Table 3
stg
 3.6 V.
in
endu
Table 5
Table
DD
to
added in Table 12 “Flash characteristics”.
 3.6 V in Table 15.
Table 4
17.
Table 7 (Table note
-
-
-
-
Change notice
-
updated.
32-bit ARM Cortex-M0 microcontroller
and
LPC1111/12/13/14
Section
Section 2
7.7.1.
Supersedes
LPC1111_12_13_14 v.4
LPC1111_12_13_14 v.3
LPC1111_12_13_14 v.2
LPC1111_12_13_14 v.1
-
hys
7).
and
OL
= 0.05V
changed to 3.5 mA
Section
© NXP B.V. 2011. All rights reserved.
DD
7.15.
in Table 7.
Section 2
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