LPC1113 NXP [NXP Semiconductors], LPC1113 Datasheet
LPC1113
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LPC1113 Summary of contents
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... Serial Wire Debug. System tick timer. Memory: (LPC1114 (LPC1113 (LPC1112 (LPC1111) on-chip flash programming memory. 8 kB SRAM. In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. ...
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NXP Semiconductors Four general purpose counter/timers with a total of four capture inputs and 13 match outputs. Programmable WatchDog Timer (WDT). Programmable windowed WDT on LPC111x/102/202/302 only. Analog peripherals: 10-bit ADC with input multiplexing among ...
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... HVQFN33 LPC1113FHN33/301 HVQFN33 LPC1113FHN33/302 HVQFN33 LPC1114FHN33/201 HVQFN33 LPC1114FHN33/202 HVQFN33 LPC1114FHN33/301 HVQFN33 LPC1114FHN33/302 HVQFN33 LPC1113FBD48/301 LQFP48 LPC1113FBD48/302 LQFP48 LPC1114FBD48/301 LQFP48 LPC1114FBD48/302 LQFP48 LPC1111_12_13_14 Product data sheet Description HVQFN: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 7 7 0.85 mm HVQFN: plastic thermal enhanced very thin quad flat package; no leads ...
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... LPC1100L LPC1112 LPC1112FHN33/101 LPC1100 LPC1112FHN33/102 LPC1100L LPC1112FHN33/201 LPC1100 LPC1112FHN33/202 LPC1100L LPC1113 LPC1113FHN33/201 LPC1100 LPC1113FHN33/202 LPC1100L LPC1113FHN33/301 LPC1100 LPC1113FHN33/302 LPC1100L LPC1113FBD48/301 LPC1100 LPC1113FBD48/302 LPC1100L LPC1114 LPC1114FHN33/201 LPC1100 LPC1114FHN33/202 LPC1100L LPC1114FHN33/301 LPC1100 LPC1114FHN33/302 LPC1100L LPC1114FBD48/301 LPC1100 LPC1114FBD48/302 LPC1100L LPC1111_12_13_14 Product data sheet Flash ...
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NXP Semiconductors 5. Block diagram LPC1111/12/13/14 HIGH-SPEED GPIO ports GPIO PIO0/1/2/3 RXD TXD (1) DTR, DSR , CTS, (1) (1) DCD , RI , RTS CT32B0_MAT[3:0] 32-bit COUNTER/TIMER 0 CT32B0_CAP0 CT32B1_MAT[3:0] 32-bit COUNTER/TIMER 1 CT32B1_CAP0 CT16B0_MAT[2:0] 16-bit COUNTER/TIMER 0 CT16B0_CAP0 ...
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... PIO1_8/CT16B1_CAP0 PIO0_2/SSEL0/CT16B0_CAP0 PIO2_7 PIO2_8 Fig 2. Pin configuration LQFP48 package LPC1111_12_13_14 Product data sheet LPC1113FBD48/301 6 LPC1113FBD48/302 LPC1114FBD48/301 7 LPC1114FBD48/302 All information provided in this document is subject to legal disclaimers. Rev. 5 — 22 June 2011 LPC1111/12/13/14 32-bit ARM Cortex-M0 microcontroller 36 PIO3_0/DTR ...
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NXP Semiconductors PIO2_0/DTR RESET/PIO0_0 PIO0_1/CLKOUT/CT32B0_MAT2 PIO1_8/CT16B1_CAP0 PIO0_2/SSEL0/CT16B0_CAP0 Fig 3. Pin configuration HVQFN33 package LPC1111_12_13_14 Product data sheet terminal 1 index area XTALIN XTALOUT Transparent top view All ...
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... NXP Semiconductors 6.2 Pin description Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Start logic input PIO0_0 to PIO0_11 [2] RESET/PIO0_0 3 yes [3] PIO0_1/CLKOUT/ 4 yes CT32B0_MAT2 [3] PIO0_2/SSEL0/ 10 yes CT16B0_CAP0 [3] PIO0_3 14 yes [4] PIO0_4/SCL 15 yes [4] PIO0_5/SDA 16 yes [3] PIO0_6/SCK0 22 yes [3] PIO0_7/CTS 23 yes [3] PIO0_8/MISO0/ 27 yes CT16B0_MAT0 [3] PIO0_9/MOSI0/ 28 yes ...
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... NXP Semiconductors Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Start logic input [3] SWCLK/PIO0_10/ 29 yes SCK0/ CT16B0_MAT2 [5] R/PIO0_11/ 32 yes AD0/CT32B0_MAT3 PIO1_0 to PIO1_11 [5] R/PIO1_0/ 33 yes AD1/CT32B1_CAP0 [5] no R/PIO1_1/ 34 AD2/CT32B1_MAT0 [5] R/PIO1_2 AD3/CT32B1_MAT1 [5] SWDIO/PIO1_3 AD4/CT32B1_MAT2 [5] PIO1_4/AD5 CT32B1_MAT3/ WAKEUP LPC1111_12_13_14 Product data sheet … ...
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... NXP Semiconductors Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Start logic input [3] PIO1_5/RTS CT32B0_CAP0 [3] PIO1_6/RXD CT32B0_MAT0 [3] PIO1_7/TXD CT32B0_MAT1 [3] PIO1_8 CT16B1_CAP0 [3] PIO1_9 CT16B1_MAT0 [5] PIO1_10/AD6 CT16B1_MAT1 [5] PIO1_11/AD7 42 no PIO2_0 to PIO2_11 [3] PIO2_0/DTR/SSEL1 2 no [3] PIO2_1/DSR/SCK1 13 no [3] PIO2_2/DCD/MISO1 26 ...
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... NXP Semiconductors Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Start logic input [3] PIO2_10 25 no [3] PIO2_11/SCK0 31 no PIO3_0 to PIO3_5 [3] PIO3_0/DTR 36 no [3] PIO3_1/DSR 37 no [3] PIO3_2/DCD 43 no [3] PIO3_3/ [3] PIO3_4 18 no [3] PIO3_5 [6] XTALIN 6 - [6] XTALOUT [1] Pin state at reset for default function Input Output internal pull-up enabled (pins pulled up to 2.6 V for ...
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NXP Semiconductors Table 4. LPC1111/12/13/14 pin description table (HVQFN33 package) Symbol Pin Start logic input PIO0_0 to PIO0_11 [2] RESET/PIO0_0 2 yes [3] PIO0_1/CLKOUT/ 3 yes CT32B0_MAT2 [3] PIO0_2/SSEL0/ 8 yes CT16B0_CAP0 [3] PIO0_3 9 yes [4] PIO0_4/SCL 10 yes ...
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NXP Semiconductors Table 4. LPC1111/12/13/14 pin description table (HVQFN33 package) Symbol Pin Start logic input [5] R/PIO0_11/AD0/ 21 yes CT32B0_MAT3 PIO1_0 to PIO1_11 [5] R/PIO1_0/AD1/ 22 yes CT32B1_CAP0 [5] R/PIO1_1/AD2 CT32B1_MAT0 [5] no R/PIO1_2/AD3/ 24 CT32B1_MAT1 [5] SWDIO/PIO1_3/ ...
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NXP Semiconductors Table 4. LPC1111/12/13/14 pin description table (HVQFN33 package) Symbol Pin Start logic input [3] PIO1_7/TXD CT32B0_MAT1 [3] PIO1_8 CT16B1_CAP0 [3] PIO1_9 CT16B1_MAT0 [5] PIO1_10/AD6 CT16B1_MAT1 [5] PIO1_11/AD7 27 no PIO2_0 ...
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... The ARM Cortex- general purpose, 32-bit microprocessor, which offers high performance and very low power consumption. 7.2 On-chip flash program memory The LPC1111/12/13/14 contain 32 kB (LPC1114 (LPC1113 (LPC1112 (LPC1111) of on-chip flash memory. 7.3 On-chip SRAM The LPC1111/12/13/14 contain a total of 8 kB on-chip static RAM memory. ...
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... ROM reserved 8 kB SRAM (LPC1113/14/301/302 SRAM (LPC1111/12/13/14/201/202 SRAM (LPC1111/12/101/102) reserved 32 kB on-chip flash (LPC1114 on-chip flash (LPC1113 on-chip flash (LPC1112 on-chip flash (LPC1111 (1) LQFP48 package only. Fig 4. LPC1111/12/13/14 memory map 7 ...
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NXP Semiconductors • In the LPC1111/12/13/14, the NVIC supports 32 vectored interrupts including inputs to the start logic from individual GPIO pins. • Four programmable interrupt priority levels with hardware priority level masking. • Software interrupt generation. ...
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NXP Semiconductors • Programmable open-drain mode for parts LPC111x/102/202/302. 7.8 UART The LPC1111/12/13/14 contain one UART. Support for RS-485/9-bit mode allows both software address detection and automatic address detection using 9-bit mode. The UART includes a fractional baud rate generator. ...
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NXP Semiconductors 2 The I C-bus is bidirectional for inter-IC control using only two wires: a Serial Clock Line (SCL) and a Serial DAta line (SDA). Each device is recognized by a unique address and can operate as either a ...
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NXP Semiconductors 7.12 General purpose external event counter/timers The LPC1111/12/13/14 includes two 32-bit counter/timers and two 16-bit counter/timers. The counter/timer is designed to count cycles of the system derived clock. It can optionally generate interrupts or perform other actions at ...
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NXP Semiconductors • Selectable time period from (T multiples of T • The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator (IRC), the Watchdog oscillator, or the main clock. This gives a wide range of potential ...
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NXP Semiconductors IRC oscillator watchdog oscillator IRC oscillator system oscillator SYSPLLCLKSEL (system PLL clock select) Fig 5. LPC1111/12/13/14 clock generation block diagram 7.16.1.1 Internal RC oscillator The IRC may be used as the clock source for the WDT, and/or as ...
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NXP Semiconductors 7.16.1.3 Watchdog oscillator The watchdog oscillator can be used as a clock source that directly drives the CPU, the watchdog timer, or the CLKOUT pin. The watchdog oscillator nominal frequency is programmable between 7.8 kHz and 1.7 MHz. ...
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NXP Semiconductors • Efficiency mode corresponding to optimized balance of current consumption and CPU performance. • Low-current mode corresponding to lowest power consumption. In addition, the power profile includes routines to select the optimal PLL settings for a given system ...
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NXP Semiconductors 7.17.2 Reset Reset has four sources on the LPC1111/12/13/14: the RESET pin, the Watchdog reset, Power-On Reset (POR), and the BrownOut Detection (BOD) circuit. The RESET pin is a Schmitt trigger input pin. Assertion of chip reset by ...
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NXP Semiconductors CAUTION If level three Code Read Protection (CRP3) is selected, no future factory testing can be performed on the device. In addition to the three CRP levels, sampling of pin PIO0_1 for valid user code can be disabled. ...
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NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (core and external rail input voltage I I supply current DD I ground current ...
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NXP Semiconductors 9. Static characteristics Table 6. Static characteristics = 40 C to +85 C, unless otherwise specified. T amb Symbol Parameter V supply voltage (core DD and external rail) LPC1100 series (LPC111x/101/201/301) power consumption I supply current DD LPC1100L ...
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NXP Semiconductors Table 6. Static characteristics = 40 C to +85 C, unless otherwise specified. T amb Symbol Parameter V input voltage I V output voltage O V HIGH-level input IH voltage V LOW-level input voltage IL V hysteresis voltage ...
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NXP Semiconductors Table 6. Static characteristics = 40 C to +85 C, unless otherwise specified. T amb Symbol Parameter V LOW-level input voltage IL V hysteresis voltage hys V HIGH-level output OH voltage V LOW-level output OL voltage I HIGH-level ...
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NXP Semiconductors Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. [ C. [2] T amb [3] I measurements were performed with all pins configured as GPIO outputs driven LOW ...
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NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity ...
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NXP Semiconductors 9.1 BOD static characteristics Table C. T amb Symbol V th [1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC111x user manual. 9.2 Power consumption LPC111x/101/201/301 ...
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NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. Fig 7. (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; ...
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NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. Fig 9. (μA) Fig 10. Deep-sleep mode: Typical supply current I LPC1111_12_13_14 Product data sheet ...
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NXP Semiconductors (μA) Fig 11. Deep power-down mode: Typical supply current I 9.3 Power consumption LPC111x/102/202/302 Power measurements in Active, Sleep, and Deep-sleep modes were performed under the following conditions (see LPC111x user manual): • Configure all pins as GPIO ...
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NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. Fig 12. Active mode: Typical supply current I (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) ...
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NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. Fig 14. Sleep mode: Typical supply current I LPC1111_12_13_14 Product data sheet −40 ...
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NXP Semiconductors (μA) Fig 15. Deep-sleep mode: Typical supply current I (μA) Fig 16. Deep power-down mode: Typical supply current I LPC1111_12_13_14 Product data sheet 5 4.5 3 3 2.5 1.5 −40 ...
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NXP Semiconductors 9.4 Peripheral power consumption The supply current per peripheral is measured as the difference in supply current between the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG and PDRUNCFG (for analog blocks) registers. All other ...
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NXP Semiconductors 9.5 Electrical pin characteristics V Fig 17. High-drive output: Typical HIGH-level output voltage V (mA) Fig 18. I LPC1111_12_13_14 Product data sheet 3 °C (V) 25 °C −40 °C 3.2 2.8 2 ...
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NXP Semiconductors (mA) Fig 19. Typical LOW-level output current I V Fig 20. Typical HIGH-level output voltage V LPC1111_12_13_14 Product data sheet 0.2 Conditions 3.3 V; standard port pins and PIO0_7. ...
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NXP Semiconductors (μA) Fig 21. Typical pull-up current I (μA) Fig 22. Typical pull-down current I LPC1111_12_13_14 Product data sheet −10 − °C 25 °C −40 °C −50 − Conditions ...
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NXP Semiconductors 10. Dynamic characteristics 10.1 Power-up ramp conditions Table 10. = 40 C to +85 C. T amb Symbol Parameter wait V I [1] See [2] The wait time specifies the time the power supply must ...
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NXP Semiconductors 10.3 External clock Table 12. = 40 C to +85 amb Symbol f osc T cy(clk) t CHCX t CLCX t CLCH t CHCL [1] Parameters are valid over operating temperature range unless otherwise specified. ...
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NXP Semiconductors 10.4 Internal oscillators Table 13. = 40 C to +85 C; 2.7 V amb Symbol f osc(RC) [1] Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not guaranteed. The values ...
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NXP Semiconductors 10.5 I/O pins Table 15. = 40 C to +85 C; 3.0 V amb Symbol [1] Applies to standard port pins and RESET pin. 2 10.6 I C-bus Table 16. = ...
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NXP Semiconductors [6] The maximum t output stage t SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified t [7] In Fast-mode Plus, fall time is specified the same for both output stage and ...
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NXP Semiconductors Table 17. Dynamic characteristics of SPI pins in SPI mode Symbol Parameter SPI slave (in SPI mode) T PCLK cycle time cy(PCLK) t data set-up time DS t data hold time DH t data output valid time in ...
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NXP Semiconductors SCK (CPOL = 0) SCK (CPOL = 1) Fig 28. SPI slave timing in SPI mode LPC1111_12_13_14 Product data sheet T cy(clk) MOSI DATA VALID t MISO DATA VALID MOSI DATA VALID t v(Q) MISO DATA VALID Pin ...
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NXP Semiconductors 11. Application information 11.1 ADC usage notes The following guidelines show how to increase the performance of the ADC in a noisy environment beyond the ADC specifications listed in • The ADC input trace must be short and ...
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NXP Semiconductors Fig 30. Oscillator modes and models: oscillation mode of operation and external crystal Table 18. Fundamental oscillation frequency F 1 MHz - 5 MHz 5 MHz - 10 MHz 10 MHz - 15 MHz 15 MHz - 20 ...
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NXP Semiconductors order to keep the noise coupled in via the PCB as small as possible. Also parasitics should stay as small as possible. Values of C accordingly to the increase in parasitics of the PCB layout. 11.4 Standard I/O ...
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NXP Semiconductors 11.5 Reset pad configuration Fig 32. Reset pad configuration 11.6 ElectroMagnetic Compatibility (EMC) Radiated emission measurements according to the IEC61967-2 standard using the TEM-cell method are shown for the LPC1114FBD48/302 in Table 20 3 ...
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NXP Semiconductors 12. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are the original ...
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NXP Semiconductors HVQFN33: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 0.85 mm terminal 1 index area terminal 1 32 index area Dimensions (1) Unit ...
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NXP Semiconductors 13. Soldering Footprint information for reflow soldering of LQFP48 package solder land occupied area DIMENSIONS 0.500 0.560 10.350 10.350 7.350 Fig 35. Reflow soldering of the LQFP48 package ...
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NXP Semiconductors Footprint information for reflow soldering of HVQFN33 package solder land solder paste deposit occupied area Fig 36. Reflow soldering of the HVQFN33 package LPC1111_12_13_14 Product data sheet OID = 8.20 OA PID = 7.25 PA+OA OwDtot = 5.10 ...
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NXP Semiconductors 14. Abbreviations Table 21. Acronym ADC AHB APB BOD GPIO PLL RC SPI SSI SSP TEM UART LPC1111_12_13_14 Product data sheet Abbreviations Description Analog-to-Digital Converter Advanced High-performance Bus Advanced Peripheral Bus BrownOut Detection General Purpose Input/Output Phase-Locked Loop ...
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NXP Semiconductors 15. Revision history Table 22. Revision history Document ID Release date LPC1111_12_13_14 v.5 20110622 Modifications: LPC1111_12_13_14 v.4 20110210 Modifications: LPC1111_12_13_14 v.3 20101110 Modifications: LPC1111_12_13_14 v.2 20100818 Modifications: LPC1111_12_13_14 v.1 20100416 LPC1111_12_13_14 Product data sheet Data sheet status Product ...
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NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use neither qualified nor tested in accordance with automotive testing ...
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NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . ...
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NXP Semiconductors 16.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 16.3 Disclaimers . . . . . ...