TE28F200B5T80 INTEL [Intel Corporation], TE28F200B5T80 Datasheet - Page 5

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TE28F200B5T80

Manufacturer Part Number
TE28F200B5T80
Description
SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
Manufacturer
INTEL [Intel Corporation]
Datasheet

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1.0
This datasheet contains specifications for 2-, 4-,
and 8-Mbit Smart 5 boot block flash memories.
Section 1.0 provides a feature overview. Sections
2.0, 3.0, and 4.0 describe the product and
functionality. Section 5.0 details the electrical and
timing specifications for both commercial and
extended temperature operation. Finally, Sections
6.0 and 7.0 provide ordering and reference
information.
1.1
The Smart 5 boot block flash memory family offers
identical
SmartVoltage products, except the Smart 5 boot
block -B5 parts only support 5 V V
The following differences distinguish the Smart 5
boot block products from their predecessors:
V
V
Bus-width
Speed (ns)
Memory Arrangement
Blocking
Boot Location
Locking
Operating Temperature
Erase Cycling
Packages
CC
PP
ADVANCE INFORMATION
Prog/Erase Voltage
Read Voltage
INTRODUCTION
New Features in the
Smart 5 Memory Products
Feature
features
Commercial
Extended
Boot
Parameter
Main
with
Table 1. Smart 5 Boot Block Family: Feature Summary
x16: 128K x 16
the
x8: 256K x 8
1 x 128 KB
8- or 16-bit
28F200B5
1 x 16 KB
1 x 96 KB
2 x 8 KB
100,000 cycles at Commercial, 10,000 cycles at Extended
CC
Commercial: 0 °C – +70 C, Extended: -40 °C – +85 C
80
BV/CV/BE/CE
read voltage.
All other blocks protectable using V
Boot Block lockable using WP# and/or RP#
60, 80
5 V
Top or Bottom boot locations available
44-PSOP, 48-TSOP
x16: 256K x 16
x8: 512K x 8
3 x 128 KB
8- or 16-bit
28F400B5
10% or 12 V
1 x 16 KB
1 x 96 KB
2 x 8 KB
5 V
80
5%, 5 V
SMART 5 BOOT BLOCK MEMORY FAMILY
1.2
The Smart 5 boot block memory family provides
pinout-compatible
2-, 4-, and 8-Mbit densities. The 28F200B5,
28F400B5, and 28F800B5 can be configured to
operate either in 16-bit or 8-bit bus mode, with the
data divided into individually erasable blocks. The
28F004B5 provides 8-bit operation in a compact
package.
A delay is required if the part is reset during an
in-progress program or erase operation.
On the fly word-byte mode switching is no
longer supported. Word-byte mode must be
configured at power-up and remain stable
during operation.
Write operations are no longer specified as
WE#- or CE#-controlled in favor of a simpler
“unified” write method, which is compatible
with either of the old methods.
x16: 512K x 16
5%, auto-detected
8- or 16-bit
7 x 128 KB
28F800B5
x8: 1M x 8
1 x 16 KB
1 x 96 KB
2 x 8 KB
70, 90
10%
Product Overview
90
PP
switch
flash
not available
x8: 512K x 8
3 x 128 KB
28F004B5
1 x 16 KB
1 x 96 KB
40-TSOP
2 x 8 KB
60, 80
8-bit
memories
Section 5.2
Section 5.2
Table 2
Section 5.6
Section 5.6
Section 2.3,
Section 3.3
Section 5.2
Figs. 1-2
Figs. 4-7
Reference
at
the
5

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