TE28F200B5T80 INTEL [Intel Corporation], TE28F200B5T80 Datasheet - Page 30

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TE28F200B5T80

Manufacturer Part Number
TE28F200B5T80
Description
SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
Manufacturer
INTEL [Intel Corporation]
Datasheet

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Quantity:
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SMART 5 BOOT BLOCK MEMORY FAMILY
NOTE:
C
30
5 V Standard Test
5 V High-Speed Test
L
includes jig capacitance.
Test Configuration
Test Configuration Component Values
DEVICE
UNDER
TEST
Figure 13. Test Configuration
C
L
V
CC
C
L
100
30
R
R
(pF) R
1
2
580
580
1
( ) R
OUT
390
390
2
0599-12
( )
1.
2.
3.
4.
t
t
PLPH
PLRH
Figure 14. AC Waveform for Reset Operation
Sym
(A) Reset during Read Mode
(B) Reset during Program or Block Erase,
(C) Reset Program or Block Erase,
RP# (P)
RP# (P)
RP# (P)
If RP# is tied to V
These specifications are valid for all product versions
(packages and speeds).
If RP# is asserted while a program or block erase, is
not executing, the reset will complete within t
A reset time, t
are valid. See Section 3.1.5 for detailed information.
ADVANCE INFORMATION
Table 9. Reset Specifications
RP# Pulse Low
Time
RP# Low to Reset
during Prog/Erase
V
V
V
V
V
V
IH
IL
IH
IH
IL
IL
Parameter
PHQV
CC
t
Complete
t
, is required after t
PLPH
PLRH
, these specs are not applicable.
Abort
t
t
t
PLPH
PLPH
PLRH
Complete
Power-
Down
Deep
Abort
Min
t
t
t
60
PHQV
PHWL
PHEL
t
PLPH
PLRH
t
t
t
t
t
t
PHQV
PHWL
PHEL
PHQV
PHWL
PHEL
>
t
Max
PLPH
t
12
until outputs
PLRH
(1)
PLPH
<
t
Unit
.
PLRH
ns
0599-13
s

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