TE28F200B5T80 INTEL [Intel Corporation], TE28F200B5T80 Datasheet - Page 29

• Manufacturer Part Number: TE28F200B5T80
• Description: SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
• Manufacturer: INTEL [Intel Corporation]

NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at V
2. I
3. Block erases and word/byte program operations are inhibited when V
4. Sampled, not 100% tested.
5. Automatic Power Savings (APS) reduces I
6. CMOS Inputs are either V
NOTE:
AC test inputs are driven at 3.0 V for a logic “1” and 0.0 V for a logic “0.” Input timing begins, and output timing ends, at 1.5 V.
Input rise and fall times (10% to 90%) <10 ns.
NOTE:
AC test inputs driven at V
(0.8 V
product versions (packages and speeds).
I
V
ADVANCE INFORMATION
CCES
CCES
PPH
TTL
1 and V
) . Output timing ends at V
is specified with the device deselected. If the device is read while in erase suspend mode, current draw is the sum of
and I
0.45
0.0
3.0
2.4
CCR
PPLK
.
.
INPUT
OH
INPUT
(2.4 V
CC
± 0.2 V or GND ± 0.2 V. TTL Inputs are either V
TTL
IH
) for logic “1” and V
and V
Figure 11. High Speed Test Waveform
1.5
Figure 12. Standard Test Waveform
IL
2.0
0.8
. Input rise and fall times (10% to 90%) <10 ns.
CCR
to less than 1 mA typical, in static operation.
OL
TEST POINTS
TEST POINTS
(0.45 V
TTL
SMART 5 BOOT BLOCK MEMORY FAMILY
) for logic “0.” Input timing begins at V
CC
PP
= 5.0 V, T = +25 °C. These currents are valid for all
= V
PPLK
IL
or V
, and not guaranteed in the range between
IH
.
1.5
2.0
0.8
OUTPUT
OUTPUT
IH
(2.0 V
TTL
) and V
0599-10
0599-11
29
IL