ST16C1450CJ28 EXAR [Exar Corporation], ST16C1450CJ28 Datasheet - Page 5

• Manufacturer Part Number: ST16C1450CJ28
• Description: 2.97V TO 5.5V UART
• Manufacturer: EXAR [Exar Corporation]

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REV. 4.2.0
PIN DESCRIPTIONS
DATA BUS INTERFACE
MODEM OR SERIAL I/O INTERFACE
N
IOW#
IOR#
CS#
INT
RX
A0
A1
A2
D0
D1
D2
D3
D4
D5
D6
D7
TX
AME
(1450)
28-P
PDIP
21
20
19
16
14
11
18
10
1
2
3
4
5
6
7
8
9
IN
(1451)
28-P
PDIP
21
20
19
15
13
11
18
10
1
2
3
4
5
6
7
8
9
IN
28-P
(1450)
PLCC
21
20
19
16
14
11
18
10
1
2
3
4
5
6
7
8
9
IN
28-P
(1451)
PLCC
21
20
19
15
13
11
18
10
1
2
3
4
5
6
7
8
9
IN
(145X)
48-P
TQFP
30
28
27
43
45
46
47
20
17
23
3
4
5
6
9
8
7
IN
T
I/O
YPE
O
O
I
I
I
I
I
5
Address data lines [2:0]. A2:A0 selects internal UART’s
configuration registers.
Data bus lines [7:0] (bidirectional).
Input/Output Read (active low). The falling edge instigates
an internal read cycle and retrieves the data byte from an
internal register pointed by the address lines [A2:A0], places
it on the data bus to allow the host processor to read it on
the leading edge.
Input/Output Write (active low). The falling edge instigates
the internal write cycle and the rising edge transfers the
data byte on the data bus to an internal register pointed by
the address lines [A2:A0].
Chip Select input (active low). A logic 0 on this pin selects
the ST16C145X device.
Interrupt Output (three-state, active high). INT output
defaults to three-state mode and becomes active high when
MCR bit-3 is set to a logic 1. INT output becomes a logic
high level when interrupts are enabled in the interrupt
enable register (IER), and whenever the transmitter,
receiver, line and/or modem status register has an active
condition.
Transmit Data. This output is associated with individual
serial transmit channel data from the 145X. The TX signal
will be a logic 1 during reset, idle (no data), or when the
transmitter is disabled. During the local loopback mode, the
TX output pin is disabled and TX data is internally con-
nected to the UART RX input.
Receive Data. This input is associated with individual serial
channel data to the 145X. Normal received data input idles
at logic 1 condition. This input must be connected to its idle
logic state, logic 1, else the receiver may report “receive
break” and/or “error” condition(s).
D
ESCRIPTION
2.97V TO 5.5V UART
ST16C1450/51