SAK-TC1767-256F133HL INFINEON [Infineon Technologies AG], SAK-TC1767-256F133HL Datasheet - Page 29

• Manufacturer Part Number: SAK-TC1767-256F133HL
• Description: 32-Bit Single-Chip Microcontroller
• Manufacturer: INFINEON [Infineon Technologies AG]

one independent Flash bank, whereas the Data Flash is built of two Flash banks,
allowing the following combinations of concurrent Flash operations:
•
•
•
Both, the Program Flash and the Data Flash, provide error correction of single-bit errors
within a 64-bit read double-word, resulting in an extremely low failure rate. Read
accesses to Program Flash are executed in 256-bit width, to Data Flash in 64-bit width
(both plus ECC). Single-cycle burst transfers of up to 4 double-words and sequential
prefetching with control of prefetch hit are supported for Program Flash.
The minimum programming width is the page, including 256 bytes in Program Flash and
128 bytes in Data Flash. Concurrent programming and erasing in Data Flash is
performed using an automatic erase suspend and resume function.
A basic block diagram of the Flash Module is shown in the following figure.
Figure 4
All Flash operations are controlled simply by transferring command sequences to the
Flash which are based on JEDEC standard. This user interface of the embedded Flash
is very comfortable, because all operations are controlled with high level commands,
such as “Erase Sector”. State transitions, such as termination of command execution, or
errors are reported to the user by maskable interrupts. Command sequences are
Data Sheet
Write Bus
Addr Bus
Control
Read Bus
Read code or data from Program Flash, while one bank of Data Flash is busy with a
program or erase operation.
Read data from one bank of Data Flash, while the other bank of Data Flash is busy
with a program or erase operation.
Program one bank of Data Flash while erasing the other bank of Data Flash, read
from Program Flash.
64
64
Basic Block Diagram of Flash Module
Flash Interface&Control Module
State Machine FCS
Flash Command
FIM
ECC Block
PMU
25
ECC Code
RD_DATA
Address
WR_DATA
Control
Flash FSI & Array
64
64
8
8
PF-Read
DF-Read
Microcode
256+32 bit
Buffers
FSRAM
256 byte
128 byte
Buffer
Buffer
64+8 bit
Page
Write
SFRs
FSI
and
and
Flash_BasicBlockDiagram _generic.vsd
Flash Array Module
Redundancy
Control
Bank 0
Bank 1
FAM
Flash
Data
Program
Flash
Voltage Control
Introduction
V1.3, 2009-09
Bank 0
Bank 1
TC1767