SAK-TC1767-256F133HL INFINEON [Infineon Technologies AG], SAK-TC1767-256F133HL Datasheet - Page 119

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SAK-TC1767-256F133HL

Manufacturer Part Number
SAK-TC1767-256F133HL
Description
32-Bit Single-Chip Microcontroller
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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7) The RCLK max. input rise/fall times are best case parameters for
5.3.8.2
Table 24
Parameter
FCLP clock period
SOP/ENx outputs delay
from FCLP rising edge
SDI bit time
SDI rise time
SDI fall time
1) FCLP signal rise/fall times are the same as the A2 Pads rise/fall times.
2) FCLP signal high and low can be minimum 1 ×
3)
Figure 33
Note: Sample the data at SOP with the falling edge of FCLP in the target device.
Data Sheet
input signal rise/fall times can be used for longer RCLK clock periods.
T
MSCmin
FCLP
SOP
EN
SDI
=
T
Micro Second Channel (MSC) Interface Timing
SYS
MSC Interface Timing (Operating Conditions apply), C
MSC Interface Timing
= 1/
f
SYS
1)2)
. When
t
45
f
SYS
= 80 MHz,
Symbol
t
t
t
t
t
40
45
46
48
49
t
46
CC 2 ×
CC -10
CC 8 ×
SR
SR
t
40
t
40
T
Min.
MSC
= 25 ns
115
.
T
T
t
48
MSC
MSC
3)
t
Values
45
t
Typ.
46
f
SYS
= 80 MHz. For reduction of EMI, slower
Max.
10
100
100
t
Electrical Parameters
49
MSC_Tmg_1.vsd
Unit
ns
ns
ns
ns
ns
L
0.9
0.1
= 50 pF
0.9
0.1
V
V
V
V
V1.3, 2009-09
DDP
DDP
DDP
DDP
Note /
Test Con
dition
TC1767

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