AD9397/PCB AD [Analog Devices], AD9397/PCB Datasheet - Page 20

• Manufacturer Part Number: AD9397/PCB
• Description: DVI Display Interface
• Manufacturer: AD [Analog Devices]

AD9397
0x26—Bit[7] Output Three-State
When enabled, this bit puts all outputs (except SOGOUT) in a
high impedance state. 0 = normal outputs. 1 = all outputs
(except SOGOUT) in high impedance mode. The power-up
default setting is 0.
0x26—Bit[3] Power-Down Polarity
This bit defines the polarity of the input power-down pin. 0 =
power-down pin is active low. 1 = power-down pin is active
high. The power-up default setting is 1.
0x26—Bits[2:1] Power-Down Pin Function
These bits define the different operational modes of the power-
down pin. These bits are functional only when the power-down
pin is active; when it is not active, the part is powered up and
functioning. 0x = the chip is powered down and all outputs are
in high impedance mode. 1x = the chip remains powered up,
but all outputs are in high impedance mode. The power-up
default setting is 00.
0x26—Bit[0] Power-Down
This bit is used to put the chip in power-down mode. In this
mode, the power dissipation is reduced to a fraction of the
typical power (see Table 1 for exact power dissipation). When in
power-down, the HSOUT, VSOUT, DATACK, and all 30 of the
data outputs are put into a high impedance state. Note that the
SOGOUT output is not put into high impedance. Circuit blocks
that continue to be active during power-down include the
voltage references, sync processing, sync detection, and the
serial register. These blocks facilitate a fast start-up from power-
down. 0 = normal operation. 1 = power-down. The power-up
default setting is 0.
0x27—Bit[7] Auto Power-Down Enable
This bit enables the chip to go into low power mode, or seek
mode if no sync inputs are detected. 0 = auto power-down
disabled. 1 = chip powers down if no sync inputs present. The
power-up default setting is 1.
0x27—Bit[6] HDCP A0 Address
This bit sets the LSB of the address of the HDCP I
should be set to 1 only for a second receiver in a dual-link
configuration. The power-up default is 0.
BT656 GENERATION
0x27—Bit[4] BT656 Enable
This bit enables the output to be BT656 compatible with the
defined start of active video (SAV) and end of active video
(EAV) controls to be inserted. These require specification of the
number of active lines, active pixels per line, and delays to place
these markers. 0 = disable BT656 video mode. 1 = enable BT656
video mode. The power-up default setting is 0.
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0x27—Bit[3] Force DE Generation
This bit allows the use of the internal DE generator in DVI
mode. 0 = internal DE generation disabled. 1 = force DE
generation via programmed registers. The power-up default
setting is 0.
0x27—Bits[2:0] Interlace Offset
These bits define the offset in HSYNCs from Field 0 to Field 1.
The power-up default setting is 000.
0x28—Bits[7:2] VSYNC Delay
These bits set the delay (in lines) from the leading edge of
VSYNC to active video. The power-up default setting is 24.
0x28—Bit[1:0] HSYNC Delay MSBs
These 2 bits and the following 8 bits set the delay (in pixels)
from the HSYNC leading edge to the start of active video. The
power-up default setting is 0x104.
0x29—Bits[7:0] HSYNC Delay LSBs
See the HSYNC Delay MSBs section.
0x2A—Bits[3:0] Line Width MSBs
These 4 bits and the following 8 bits set the width of the active
video line (in pixels). The power-up default setting is 0x500.
0x2B—Bits[7:0] Line Width LSBs
See the line width MSBs section.
0x2C—Bits[3:0] Screen Height MSBs
These 4 bits and the following 8 bits set the height of the active
screen (in lines). The power-up default setting is 0x2D0.
0x2D—Bits[7:0] Screen Height LSBs
See the Screen Height MSBs section.
0x2F—Bit[6] TMDS Sync Detect
This read-only bit indicates the presence of a TMDS DE. 0 = no
TMDS DE present. 1 = TMDS DE detected.
0x2F—Bit[5] TMDS Active
This read-only bit indicates the presence of a TMDS clock. 0 =
no TMDS clock present. 1 = TMDS clock detected.
0x2F—Bit[3] HDCP Keys Read
This read-only bit reports if the HDCP keys were read
successfully. 0 = failure to read HDCP keys. 1 = HDCP keys
read.
0x2F—Bits[2:0] DVI Quality
These read-only bits indicate a level of DVI quality based on the
DE edges. A larger number indicates a higher quality.