AN983 ETC [List of Unclassifed Manufacturers], AN983 Datasheet - Page 65

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AN983

Manufacturer Part Number
AN983
Description
PCI/miniPCI-to-Ethernet LAN Controller
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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8.5 NETWORK OPERATION
8.5.1 MAC OPERATION
*Note: If padding is disabled (TDES1 bit23), the data field may be shorter than 46 bytes.
Rev. 1.8
Field
Preamble
Start Frame Delimiter
Destination Address
Source Address
Length/Type
Data
CRC
In the MAC (Media Access Control) portion of AN983B, it incorporates the essential protocol
requirements for operating as an IEEE802.3 and Ethernet compliant node.
The differences between the encapsulation and a MAC frame while operating in the
100BASE-TX mode are listed as follow:
1. The first byte of the preamble is replaced by the JK code according to the IEE802.3u,
clause 24.
2. After the CRC field of the MAC frame, the AN983B insert the TR code according to the
IEE802.3u, clause 24.
When operate in 100BASE-TX mode the AN983B detects a JK code for a preamble as well
as a TR code for the packet end. If a JK code is not detected, the AN983B will abort this
frame receiving and wait for a new JK code detection. If a TR code is not detected, the
AN983B will report a CRC error.
The Inter-Frame Gap (IFG) time is divided into two parts:
Format
Transmit Data Encapsulation
Receive Data Decapsulation
Deferring
Description
A 7-byte field of (10101010b)
A 1-byte field of (10101011b)
A 6-byte field
A 6-byte field
A 2-byte field indicated the frame is in IEEE802.3 format or Ethernet
format.
IEEE802.3 format: 0000H ~ 05DCH for Length field
Ethernet format: 05DD ~ FFFFH for Type field
*46 ~ 1500 bytes of data information
A 32-bit cyclic redundant code for error detection
AN983B
www.admtek.com.tw
ADMtek Inc.
PCI/miPCI Fast Ethernet Controller with integrated PHY
65

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