AN983 ETC [List of Unclassifed Manufacturers], AN983 Datasheet - Page 37

• Manufacturer Part Number: AN983
• Description: PCI/miniPCI-to-Ethernet LAN Controller
• Manufacturer: ETC [List of Unclassifed Manufacturers]

R/W1C*, Read only and Write one cleared.
CSR14 (offset = 70h), WPDR –Wake-up Pattern Data Register
All six wake-up patterns filtering information are programmed through WPDR register. The filtering
information is as follows,
Offset
0000h
0004h
26
25
24-18
17
16
15-11
10
9
8
7-3
2
1
0
Rev. 1.8
WP4E
WP5E
---
LinkOFF
LinkON
---
WFRE
MPRE
LSCE
---
WFR
MPR
LSC
31
Wake-up Pattern Four Matched Enable.
Wake-up Pattern Five Matched Enable.
Reserved
Link Off Detect Enable. The AN983B will set the LSC bit of
CSR13 after it has detected that link status is from ON to
OFF.
Link On Detect Enable. The AN983B will set the LSC bit of
CSR13 after it has detected that link status is from OFF to
ON.
Reserved
Wake-up Frame Received Enable. The AN983B will include
the “Wake-up Frame Received” event into wake-up events.
If this bit is set, AN983B will assert PMES bit of PMR1 after
AN983B has received a matched wake-up frame.
Magic Packet Received Enable. The AN983B will include the
“Magic Packet Received” event into wake-up events. If this
bit is set, AN983B will assert PMES bit of PMR1 after AN983B
has received a Magic packet.
Link Status Changed Enable. The AN983B will include the
“Link Status Changed” event into wake-up events. If this
bit is set, AN983B will assert PMES bit of PMR1 after AN983B
has detected a link status changed event.
Reserved
Wake-up Frame Received,
1: Indicates AN983B has received a wake-up frame. It is
cleared by write 1 or upon power-up reset. It is not
affected by a hardware or software reset.
Magic Packet Received,
1: Indicates AN983B has received a magic packet. It is
cleared by write 1 or upon power-up reset. It is not
affected by a hardware or software reset.
Link Status Changed,
1: Indicates AN983B has detected a link status change event.
It is cleared by write 1 or upon power-up reset. It is not
affected by a hardware or software reset.
AN983B
Wake-up pattern 1 mask bits 63:32
Wake-up pattern 1 mask bits 31:0
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PCI/miPCI Fast Ethernet Controller with integrated PHY
16 15
8
0
0
0
0
00001
0
0
0
X
X
X
7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W1C*
R/W1C*
R/W1C*
37
0