MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 121

• Manufacturer Part Number: MC68HC908QY2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

9.4.3 Data Format
9.4.4 Break Signal
9.4.5 Baud Rate
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
The communication baud rate is controlled by the external frequency
and the divide ratio is 1024.
Table 9-3
baud rate of 9600 bps. Other standard baud rates can be accomplished
using proportionally higher or lower frequency generators. If a crystal is
used as the source, be aware of the upper frequency limit that the MCU
can operate.
External Frequency
START
BIT
9.8304 MHz
0
—
BIT 0
has the external frequency required to achieve a standard
1
2
Table 9-3. Monitor Baud Rate Selection
Monitor ROM (MON)
BIT 1
MISSING STOP BIT
3
Figure 9-5. Monitor Data Format
Figure 9-6. Break Transaction
4
BIT 2
5
or V
V
IRQ
V
TST
6
SS
BIT 3
DD
7
BIT 4
Internal Frequency
3.2 MHz (Trimmed)
2.4576 MHz
BIT 5
2-STOP BIT DELAY BEFORE ZERO ECHO
BIT 6
0
1
BIT 7
2
Functional Description
3
Monitor ROM (MON)
STOP
Baud Rate (bps)
BIT
4
START
NEXT
5
9600
9600
BIT
6
7
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