MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 79
MC68HC908QY2
Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908QY2.pdf
(230 pages)
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7.3 RST and IRQ Pins Initialization
7.4 SIM Bus Clock Control and Generation
7.4.1 Bus Timing
7.4.2 Clock Start-Up from POR
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
RST and IRQ pins come out of reset as PTA3 and PTA2 respectively.
RST and IRQ functions can be activated by programing CONFIG2
accordingly. Refer to
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, BUSCLKX2, as shown in
In user mode, the internal bus frequency is the oscillator frequency
(BUSCLKX4) divided by four.
When the power-on reset module generates a reset, the clocks to the
CPU and peripherals are inactive and held in an inactive phase until after
the 4096 BUSCLKX4 cycle POR time out has completed. The RST pin
is driven low by the SIM during this entire period. The IBUS clocks start
upon completion of the time out.
System Integration Module (SIM)
OSCILLATOR
OSCILLATOR
FROM
FROM
Figure 7-3. SIM Clock Signals
Section 5. Configuration Register
BUSCLKX4
BUSCLKX2
SIM COUNTER
2
Figure
SIM
System Integration Module (SIM)
RST and IRQ Pins Initialization
GENERATORS
BUS CLOCK
7-3.
(CONFIG).
79
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