MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 287
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MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 287 of 454
- Download datasheet (6Mb)
MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
MODF — Mode Fault Bit
SPTE — SPI Transmitter Empty Bit
Do not write to the SPI data register unless the SPTE bit is high.
MODFEN — Mode Fault Enable Bit
This clearable, read-only flag is set in a slave SPI if the SS pin goes
high during a transmission. In a master SPI, the MODF flag is set if
the SS pin goes low at any time. Clear the MODF bit by reading the
SPI status and control register with MODF set and then writing to the
SPI status and control register. Reset clears the MODF bit.
This clearable, read-only flag is set each time the transmit data
register transfers a byte into the shift register. SPTE generates an
SPTE CPU interrupt request if the SPTIE bit in the SPI control register
is set also.
For an idle master or idle slave that has no data loaded into its
transmit buffer, the SPTE will be set again within two bus cycles since
the transmit buffer empties into the shift register. This allows the user
to queue up a 16-bit value to send. For an already active slave, the
load of the shift register cannot occur until the transmission is
completed. This implies that a back-to-back write to the transmit data
register is not possible. The SPTE indicates when the next write can
occur.
Reset sets the SPTE bit.
This read/write bit, when set to 1, allows the MODF flag to be set. If
the MODF flag is set, clearing the MODFEN does not clear the MODF
flag. If the SPI is enabled as a master and the MODFEN bit is low,
then the SS pin is available as a general-purpose I/O.
If the MODFEN bit is set, then this pin is not available as a general-
purpose I/O. When the SPI is enabled as a slave, the SS pin is not
available as a general-purpose I/O regardless of the value of
MODFEN. (See
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = SS pin at inappropriate logic level
0 = SS pin at appropriate logic level
1 = Transmit data register empty
0 = Transmit data register not empty
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
18.13.4 SS (Slave
Select).)
Serial Peripheral Interface (SPI)
Technical Data
I/O Registers
287
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