PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 295

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PIC18F2682-I/PT

Manufacturer Part Number
PIC18F2682-I/PT
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
REGISTER 23-19: RXBnDLC: RECEIVE BUFFER n DATA LENGTH CODE REGISTERS [0 ≤ n ≤ 1]
REGISTER 23-20: RXBnDm: RECEIVE BUFFER n DATA FIELD BYTE m REGISTERS
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
RXBnDm7
U-0
R-x
Unimplemented: Read as ‘0’
RXRTR: Receiver Remote Transmission Request bit
1 = Remote transfer request
0 = No remote transfer request
RB1: Reserved bit 1
Reserved by CAN Spec and read as ‘0’.
RB0: Reserved bit 0
Reserved by CAN Spec and read as ‘0’.
DLC3:DLC0: Data Length Code bits
1111 = Invalid
1110 = Invalid
1101 = Invalid
1100 = Invalid
1011 = Invalid
1010 = Invalid
1001 = Invalid
1000 = Data length = 8 bytes
0111 = Data length = 7 bytes
0110 = Data length = 6 bytes
0101 = Data length = 5 bytes
0100 = Data length = 4 bytes
0011 = Data length = 3 bytes
0010 = Data length = 2 bytes
0001 = Data length = 1 bytes
0000 = Data length = 0 bytes
RXBnDm7:RXBnDm0: Receive Buffer n Data Field Byte m bits (where 0 ≤ n < 1 and 0 < m < 7)
Each receive buffer has an array of registers. For example, Receive Buffer 0 has 8 registers: RXB0D0
to RXB0D7.
RXBnDm6
RXRTR
R-x
R-x
[0 ≤ n ≤ 1, 0 ≤ m ≤ 7]
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
RXBnDm5
RB1
R-x
R-x
PIC18F2682/2685/4682/4685
RXBnDm4
RB0
R-x
R-x
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXBnDm3
DLC3
R-x
R-x
RXBnDm2
DLC2
R-x
R-x
x = Bit is unknown
x = Bit is unknown
RXBnDm1
DLC1
R-x
R-x
DS39761B-page 293
RXBnDm0
DLC0
R-x
R-x
bit 0
bit 0

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