FDC37B80X SMSC [SMSC Corporation], FDC37B80X Datasheet - Page 153

• Manufacturer Part Number: FDC37B80X
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

PME Wake Enable
Default = 0x00 on
V
TR
POR
NAME
Table 64 - Auxiliary I/O, Logical Device 8 [Logical Device Number = 0x08]
INDEX
(R/W)
0xC8
REG
This register is used to enable individual FDC37B80x
PME wake sources onto the nPME wake bus.
When the PME Wake Enable register bit for a wake
source is active (“1”), if the source asserts a wake
event and the PME_En bit is “1”, the source will
assert the PCI nPME signal.
When the PME Wake Enable register bit for a wake
source is inactive (“0”), the PME Wake Status
register will indicate the state of the wake source but
will not assert the PCI nPME signal.
Bit[0] Reserved
Bit[1] RI2
Bit[2] RI1
Bit[3] KBD
Bit[4] MOUSE
Bit[7:5] Reserved
The PME Wake Enable register is not affected by Vcc
POR, SOFT RESET or HARD RESET.
153
DEFINITION
STATE