USB3300_06 SMSC [SMSC Corporation], USB3300_06 Datasheet - Page 33
USB3300_06
Manufacturer Part Number
USB3300_06
Description
Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.USB3300_06.pdf
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Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Datasheet
SMSC USB3300
6.1.8
DATA[7:0]
DP/DM
NXT
CLK
STP
DIR
Idle
During transmit the PHY will use NXT to control the rate of data flow into the PHY. If the USB3300
pipeline is full or bit-stuffing causes the data pipeline to overfill NXT is de-asserted and the Link will
hold the value on Data until NXT is asserted. The USB Transmit ends when the Link asserts STP while
NXT is asserted. (Note that the Link cannot assert STP with NXT de-asserted since the USB3300 is
expecting to fetch another byte from the Link in this state).
Once, the USB3300 completes transmitting, the DP/DM lines return to idle and an RXD CMD is
returned to the Link so the inter-packet timers may be updated by linestate.
In the case of Full Speed or Low Speed, once STP is asserted each FS/LS bit transition will generate
a RXD CMD since the bit times are relatively slow.
USB3300 Receiver
The USB3300 ULPI receiver fully supports HS, FS, and LS transmit operations. In all three modes the
receiver detects the start of packet and synchronizes to the incoming data packet. In the ULPI protocol,
a received packet has the priority and will immediately follow register reads and RXD CMD transfers.
Figure
6.7shows a basic USB packet received by the USB3300 over the ULPI interface.
TXD CM D
(USB tx)
SE0
D0
Figure 6.6 ULPI Transmit
D1
DATASHEET
D2
33
!SQ UELCH
D3
IDLE
Revision 1.06 (07-19-06)
Around
SE0
Turn
RXD
CM D
Around
Turn
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