PIC18F2220 MICROCHIP [Microchip Technology], PIC18F2220 Datasheet - Page 141

• Manufacturer Part Number: PIC18F2220
• Description: 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

The CCPR1H register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM opera-
tion. When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or two bits
of the TMR2 prescaler, the CCP1 pin is cleared. The
maximum PWM resolution (bits) for a given PWM
frequency is given by the following equation.
EQUATION 15-3:
TABLE 15-4:
TABLE 15-5:
 2003 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
TRISC
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
OSCCON
Legend:
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X20 devices; always maintain these bits clear.
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Note:
Name
PWM Resolution (max) =
PWM Frequency
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PWM and Timer2.
PORTC Data Direction Register
Timer2 Module Register
Timer2 Module Period Register
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
Capture/Compare/PWM Register 2 (LSB)
Capture/Compare/PWM Register 2 (MSB)
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
GIE/GIEH PEIE/GIEL
PSPIE
PSPIP
PSPIF
IDLEN
Bit 7
—
—
—
REGISTERS ASSOCIATED WITH PWM AND TIMER2
(1)
(1)
(1)
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
IRCF2
ADIF
ADIE
ADIP
Bit 6
—
—
log
TMR0IE


log(2)
DC1B1
DC2B1
IRCF1
RCIE
RCIP
F
RCIF
2.44 kHz
Bit 5
F
PWM
OSC
FFh
16
10


bits
INT0IE
DC1B0
DC2B0
IRCF0
PIC18F2220/2320/4220/4320
TXIE
TXIP
Bit 4
TXIF
9.77 kHz
FFh
10
4
CCP1M3
CCP2M3
SSPIF
SSPIE
SSPIP
OSTS
RBIE
Bit 3
39.06 kHz
15.5.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
CCP1M2
CCP2M2
TMR0IF
CCP1IE
CCP1IP
CCP1IF
FFh
IOFS
Bit 2
10
1
Set the PWM period by writing to the PR2 register.
Set the PWM duty cycle by writing to the
CCPR1L register and the CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISC<2> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP1 module for PWM operation.
CCP1M1
CCP2M1
SETUP FOR PWM OPERATION
TMR2IE
TMR2IP
TMR2IF
INT0IF
SCS1
156.25 kHz
Bit 1
3Fh
1
8
CCP1M0 --00 0000 --00 0000
CCP2M0 --00 0000 --00 0000
TMR1IF
TMR1IE 0000 0000 0000 0000
TMR1IP 1111 1111 1111 1111
SCS0
RBIF
Bit 0
312.50 kHz
1Fh
0000 000x 0000 000u
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 qq00 0000 qq00
POR, BOR
1
7
Value on
DS39599C-page 139
416.67 kHz
Value on
all other
6.58
17h
Resets
1