NHPXA270CXXX INTEL [Intel Corporation], NHPXA270CXXX Datasheet - Page 35

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NHPXA270CXXX

Manufacturer Part Number
NHPXA270CXXX
Description
Electrical, Mechanical, and Thermal Specification
Manufacturer
INTEL [Intel Corporation]
Datasheet
Electrical, Mechanical, and Thermal Specification
VF-BGA
NOTE: Refer to
(13x13)
Ball#
M24
M22
H24
H22
H23
K24
K22
K23
N24
R23
P23
P22
R21
L21
L23
L22
J22
Table 4-1. Pin Usage Summary (Sheet 6 of 17)
(23x23)
PBGA
Ball#
G22
H22
K20
K19
K21
K22
N22
N20
N21
P21
F22
L20
L21
L22
J20
J19
J22
Table 4-2
GPIO<61>
GPIO<62>
GPIO<63>
GPIO<64>
GPIO<65>
GPIO<66>
GPIO<67>
GPIO<68>
GPIO<69>
GPIO<70>
GPIO<71>
GPIO<72>
GPIO<73>
GPIO<74>
GPIO<75>
GPIO<76>
GPIO<77>
Name
for Numbered Notes on Reset and Sleep States.
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
ICOC
Type
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
GPIO<61>
GPIO<62>
GPIO<63>
GPIO<64>
GPIO<65>
GPIO<66>
GPIO<67>
GPIO<68>
GPIO<69>
GPIO<70>
GPIO<71>
GPIO<72>
GPIO<73>
GPIO<74>
GPIO<75>
GPIO<76>
GPIO<77>
Function
Reset
After
Function
Primary
L_PCLK_WR
L_LCLK _A0
L_FCLK_RD
Secondary
LDD<10>
LDD<10>
LDD<12>
LDD<12>
LDD<13>
LDD<13>
LDD<14>
LDD<14>
LDD<15>
LDD<15>
Alternate
LDD<11>
LDD<11>
Function
LDD<3>
LDD<3>
LDD<4>
LDD<4>
LDD<5>
LDD<5>
LDD<6>
LDD<6>
LDD<7>
LDD<7>
LDD<8>
LDD<8>
LDD<9>
LDD<9>
L_BIAS
Pin Listing and Signal Definitions
Intel® PXA270 Processor
Alternate
Function
Third
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Note[1]
Reset
State
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Pd-0
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
4-15
Sleep
State

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