CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 68
CY8C32_12
Manufacturer Part Number
CY8C32_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C32_12.pdf
(122 pages)
- Current page: 68 of 122
- Download datasheet (5Mb)
Table 11-3. AC Specifications
Document Number: 001-56955 Rev. *N
Note
F
F
Svdd
T
T
T
T
23. Based on device characterization (Not production tested).
STARTUP
SLEEP
IO_INIT
CPU
BUSCLK
HIBERNATE
Parameter
CPU frequency
Bus frequency
V
Time from V
IPOR to I/O ports set to their reset
states
Time from V
PRES to CPU executing code at
reset vector
Wakeup from sleep mode –
Application of non-LVD interrupt to
beginning of execution of next CPU
instruction
Wakeup from hibernate mode –
Application of external interrupt to
beginning of execution of next CPU
instruction
DD
ramp rate
Description
DDD
DDD
[23]
/V
/V
DDA
DDA
/V
/V
CCD
CCD
1.71 V
5.5 V
3.3 V
0.5 V
/V
/V
0 V
CCA
CCA
DC
Figure 11-4. F
1.71 V V
1.71 V V
V
V
boot mode (12 MHz typ.)
CCA
DDA
Valid Operating Region with SMP
/V
/V
CCD
DDD
Valid Operating Region
DDD
DDD
Conditions
, no PLL used, IMO
CPU Frequency
= regulated from
1 MHz
CPU
5.5 V
5.5 V
vs. V
DD
10 MHz
PSoC
50 MHz
Min
DC
DC
–
–
–
–
–
®
3: CY8C32 Family
Typ
–
–
–
–
–
–
–
Data Sheet
50.01
50.01
0.066
Max
100
10
66
15
Page 68 of 122
Units
MHz
MHz
V/µs
µs
µs
µs
µs
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